參數(shù)資料
型號(hào): AD6816
廠商: Analog Devices, Inc.
英文描述: Interface For ATM User-Network Interface IC to Category #5 Unshielded Twisted Pair (UTP) system or a fiber optic system.(ATM用戶(hù)網(wǎng)絡(luò)接口與#5類(lèi)非屏蔽雙絞線(xiàn)系統(tǒng)或其他光纖系統(tǒng)的接口芯片)
文件頁(yè)數(shù): 20/20頁(yè)
文件大?。?/td> 483K
代理商: AD6816
AD6816
–20–
REV. A
AD6816 Evaluation PCB Test Results Over UTP#5 Cable and
L120 Cable (Foil Twisted Pair)
The AD6816 Evaluation PCB supports error free (< 1
×
10
–11
BER) transmission over up to 110M UTP#5 cable or L120
cable. Figures 35, 36, 37 below show the different configura-
tions tested. Table III provides the test results. Note that to
properly terminate the L120 cable (120
impedance line), the
following resistor changes were made to the PCB: R9 = 60
,
R10 = 60
, R11 = 120
.
T
X
: PAIR #1 (1.2)
R
X
: PAIR #4 (7.8)
RJ
45
RJ
45
DRIVEINN
DRIVEIN
UTP#5
OR L120
CABLE
4 PAIRS
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"USER END"
J11 J10
5M
JUMPER
CABLE
BER ANALYZER
CSA 907R
CRDATA
CRCLK
5M
JUMPER
CABLE
J1
CRDATA
J9 J2 J3 J4 J5
DRIVERINN
DRIVERIN
CRDATAN
J9 J2 J3 J4 J5
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"NETWORK END"
J11 J13
J1
SEQUENCE
GENERATOR
CSA 907T
Figure 35. Configuration Test Block Diagram: Loop-Back
T
X
: PAIR #1 (1.2)
R
X
: PAIR #4 (7.8)
RJ
45
RJ
45
DRIVEINN
DRIVEIN
UTP#5
OR L120
CABLE
4 PAIRS
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"USER END"
J11 J13 J12
5M
JUMPER
CABLE
BER ANALYZER
CSA 907R
CRDATA
CRCLK
5M
JUMPER
CABLE
CRDATA
J9 J2 J3 J4 J5
DRIVERINN
DRIVERIN
CRCLKN
J9 J2 J3 J4 J5
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"NETWORK END"
J11 J13
J1
SEQUENCE
GENERATOR
CSA 907T
J1
SEQUENCE
GENERATOR
CSA 907T
CRCLK
BER ANALYZER
CSA 907R
OSCILLOSCOPE
TDS 820
Figure 36. Configuration Test Block Diagram: Loop-Back
with Work Station—End Transmitting Data
T
X
: PAIR #1 (1.2)
R
X
: PAIR #4 (7.8)
RJ
45
RJ
45
DRIVEINN
DRIVEIN
UTP#5
OR L120
CABLE
4 PAIRS
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"USER END"
J11 J13
5M
JUMPER
CABLE
BER ANALYZER
CSA 907R
CRDATA
CRCLK
5M
JUMPER
CABLE
CRDATA
J9 J2 J3 J4 J5
DRIVERINN
DRIVERIN
J9 J2 J3 J4 J5
PHYSICAL MEDIUM
DEPENDENT (PMD)
INTERFACE CARD
AD6816
EVALUATION BOARD
"NETWORK END"
J11 J13
J1
SEQUENCE
GENERATOR
CSA 907T
J1
SEQUENCE
GENERATOR
CSA 907T
CRCLK
BER ANALYZER
CSA 907R
OSCILLOSCOPE
TDS 820
Figure 37. Configuration Test Block Diagram: Dual
Simplex
C
P
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
44-Pin Thin Quad Flatpack Package (ST-44)
0.063 (1.60)
MAX
0.030 (0.75)
0.018 (0.45)
TOP VIEW
(PINS DOWN)
1
33
34
44
11
12
23
22
0.018 (0.45)
0.012 (0.30)
0.031 (0.80)
BSC
0.394
(10.0)
SQ
0.472 (12.00) SQ
0.057 (1.45)
0.053 (1.35)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
(12.00
±
0.20)
(10.0
±
0.10)
Table III. BER vs. UTP#5 & L120 Cable Length
UTP#5 (100
V
)
100 M
L120 (120
V
)
100 M
Configuration
Path(s) Tested
145 M
150 M
175 M
190M
Loop-Back (Figure 32)
Tx & Rx
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
7.50E-06
Loop-Back with WS Data
(Figure 33)
Tx
Rx
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
6.70E-08
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
1.00E-07
1.00E-10
Dual Simplex
(Figure 34)
Tx
Rx
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
8.10E-08
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
< 1.00E-11
2.80E-06
7.00E-10
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