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參數(shù)資料
| 型號： | AD6816 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Interface For ATM User-Network Interface IC to Category #5 Unshielded Twisted Pair (UTP) system or a fiber optic system.(ATM用戶網(wǎng)絡接口與#5類非屏蔽雙絞線系統(tǒng)或其他光纖系統(tǒng)的接口芯片) |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 483K |
| 代理商： | AD6816 |
AD6816
–16–
REV. A
In the receive section, the NRZ data enters the RJ45 connector
and passes through an isolation transformer and band-limiting
filter. The adaptive equalizer in the AD6816 compensates for
the amplitude and phase distortion incurred from up to 110M
UTP#5. The AD6816 baseline restoration loop compensates for
the dc wander that the transformer introduces to its input data.
Once the signal has been equalized and had its dc level re-
stored, the AD6816 recovers clock and retimes data. The
AD6816 differential recovered clock signal and retimed differ-
ential data are fed directly to the WAC-013.
Single Channel ATM UNI PHY
Figure 28 shows a more detailed block diagram of the single
channel application. The AD6816 provides the WAC-013 with
a 155 MHz Tx clock at PECL levels. The WAC-013 processes
155 Mbps Tx data directly from this 155 MHz clock. The
WAC-013 generates 155 Mbps differential NRZ data at CMOS
levels. These differential data output signals data are PECL-
level translated using the 3-resistor network (refer to Figure 25).
The AD6816 processes the NRZ data through its line driver.
The line driver output data is processed through an external low-
pass filter and transformer before entering the RJ45 connector.
TS_SER_DATA
TS_SER_DATA–
TS_SER_CLK+
TS_SER_CLK–
RS_SER_DATA+
RS_SER_DATA–
RS_SER_CLK+
RS_SER_CLK–
I
T*
WAC-013
155Mbps
SONET ATM UNI
PROCESSOR
DRIVEIN
DRIVEINN
TXCLKOUT
TXCLKOUTN
RXDATAOUT
RXDATAOUTN
RXCLKOUT
RXCLKOUTN
AD6816
TXN
TX
RX
RXN
PULSE
PE68517
*
RJ45
*
+5V
+5V
+5V
68
200
255
200
68
255
150
100
+5V
+5V
50
50
100
*
NOTE:
MANUFACTURER'S DATA SHEET IS SUBJECT TO CHANGE.
CONFIRM SPECIFICATIONS BEFORE USING THIS DEVICE.
87654321
CONTACT
ASSIGNMENT
ATM
NETWORK
EQUIPMENT
CONTACT #
1
2
3
4
5
6
7
8
RECEIVE+
RECEIVE–
NOTE 1
NOTE 1
NOTE 1
NOTE 1
TRANSMIT+
TRANSMIT–
JACK
32
37
38
43
44
1
78
94
33
98
11
10
13
17
18
14
97
7
15
3
2
1
16
8
9
10
7
8
TX+
TX–
RX+
RX–
79
93
76
75
+5V
150
100
+5V
150
100
+5V
150
100
+5V
150
100
+5V
150
100
2
Figure 28. UTP#5 Application with IgT WAC-013
TX_SER_DATA+/–
TX_SER_CLK+/–
RX_SER_DATA+/–
RX_SER_CLK+/–
LOCK
I
T*
WAC-413
QUAD
155Mbps
SONET ATM UNI PROCESSOR
DRIVEIN/N
TXCLKOUT/N
RXDATAOUTN
RXCLKOUTN
*
NOTE:
MANUFACTURER'S DATA SHEET IS SUBJECT TO CHANGE.
CONFIRM SPECIFICATIONS BEFORE USING THIS DEVICE.
(1/4)
3.3V PECL TO 5V PECL
(SEE FIG 31)
SDOUT
AD6816
TXN
TX
RX
RXN
RJ45
*
+5V +5V
50
50
100
37
38
43
44
1
7
8
+5V
2
TX+
TX–
RX+
RX–
PULSE
PE68517
*
7
15
3
2
1
16
8
9
10
5V PECL TO 3.3V PECL
(SEE FIG 30)
5V PECL TO 3.3V PECL
(SEE FIG 30)
5V PECL TO 3.3V PECL
(SEE FIG 30)
Figure 29. UTP#5 Application with IgT WAC-413
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