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參數(shù)資料
| 型號： | AD6620PCB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 65 MSPS Digital Receive Signal Processor |
| 中文描述： | 65 MSPS的數(shù)字接收信號處理器 |
| 文件頁數(shù)： | 6/43頁 |
| 文件大?。?/td> | 354K |
| 代理商： | AD6620PCB |
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AD6620
TIMING CHARACTERISTICS
(C
LOAD
= 40 pF All Outputs)
–6–
REV. 0
Test
Level
AD6620AS
Min
Parameter (Conditions)
Temp
Typ
Max
Units
MICROPROCESSOR PORT, MODE = 0
MODE 0 Input Timing Requirements:
t
SC
Control
1
to CLK Setup Time
t
HC
Control
1
to CLK Hold Time
t
HA
Address
2
to CLK Hold Time
t
ZR
CS
to Data Enabled Time
t
ZD
CS
to Data Disabled Time
t
SAM
CS
to Address/Data Setup Time
MODE 0 Read Switching Characteristics:
t
DD
CLK to Data Valid Time
t
RDY
RD
to RDY Time
MODE 0 Write Timing Requirements:
t
SC
Control
1
to CLK Setup Time
t
HC
Control
1
to CLK Hold Time
t
HM
Micro Data
3
to CLK Hold Time
t
HA
Address
2
to CLK Hold Time
t
SAM
Address/Data Setup Time to
CS
MODE 0 Write Switching Characteristics:
t
RDY
RD
to RDY Time
MICROPROCESSOR PORT, MODE = 1
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
3.0
5.0
3.0
ns
ns
ns
ns
ns
ns
5.0
5.0
0.0
Full
Full
I
IV
10.0
4.0
15.0
30.0
19.5
ns
ns
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
3.0
5.0
3.0
3.0
0.0
ns
ns
ns
ns
ns
Full
IV
4.0
19.5
ns
MODE1 Input Timing Requirements:
t
SC
Control
1
to CLK Setup Time
t
HC
Control
1
to CLK Hold Time
t
HA
Address
2
to CLK Hold Time
t
ZR
CS
to Data Enabled Time
t
ZD
CS
to Data Disabled Time
t
SAM
Address/Data Setup Time to
CS
MODE1 Read Switching Characteristics:
t
DD
CLK to Data Valid Time
t
DTACK
CLK to DTACK Time
MODE1 Write Timing Requirements:
t
SC
Control
1
to CLK Setup Time
t
HC
Control
1
to CLK Hold Time
t
HM
Micro Data
3
to CLK Hold Time
t
HA
Address
2
to CLK Hold Time
t
SAM
Address/Data Setup Time to
CS
MODE1 Write Switching Characteristics:
t
DTACK
CLK to DTACK Time
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
3.0
5.0
3.0
ns
ns
ns
ns
ns
ns
5.0
5.0
0.0
Full
Full
I
V
10.0
5.5
30.0
15.5
ns
ns
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
0.0
5.0
6.5
3.0
0.0
ns
ns
ns
ns
ns
Full
V
5.5
15.5
ns
NOTES
1
Specification pertains to: R/W (
WR
),
DS
(
RD
),
CS
.
2
Specification pertains to: A[2:0].
3
Specification pertains to: D[7:0].
Specifications subject to change without notice.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD6620AS | 65 MSPS Digital Receive Signal Processor |
| AD6620S | 65 MSPS Digital Receive Signal Processor |
| AD6620 | 65 MSPS Digital Receive Signal Processor(采樣速率65MSPS的數(shù)字接收信號處理器) |
| AD6622AS | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622PCB | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6620S | 制造商:AD 制造商全稱:Analog Devices 功能描述:65 MSPS Digital Receive Signal Processor |
| AD6620S/PCB | 制造商:Analog Devices 功能描述:DUAL CHANNEL DECIMATING RECEIV 制造商:Analog Devices 功能描述:SGNL PROCESSOR 169CSPBGA - Bulk |
| AD6622 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622AS | 制造商:Analog Devices 功能描述:Transmit Signal Processor 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL 65 MSPS DIGITAL UPCONVERTER - Bulk |
| AD6622PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
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