參數(shù)資料
型號(hào)： AD640JP-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 10/16頁
文件大小： 0K
描述： IC AMP LOG 2.3MA 20PLCC
產(chǎn)品變化通告： Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝： 250
放大器類型： 對數(shù)
電路數(shù)： 1
-3db帶寬： 350MHz
電流 - 輸入偏壓： 7µA
電壓 - 輸入偏移： 50µV
電流 - 電源： 35mA
電流 - 輸出 / 通道： 2.3mA
電壓 - 電源，單路/雙路(±)： ±4.5 V ~ 7.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 20-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 20-PLCC（9x9）
包裝： 帶卷 (TR)
AC SPECIFICATIONS
Model
AD640J
AD640B
AD640T
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
SIGNAL INPUTS (Pins 1, 20)
Input Capacitance
Either Pin to COM
2
pF
Noise Spectral Density
1 kHz to 10 MHz
2
nV/
√Hz
Tangential Sensitivity
BW = 100 MHz
–72
dBm
3 dB BANDWIDTH
Each Stage
350
MHz
All Five Stages
Pins 1 & 20 to 10 & 11
145
MHz
LOGARITHMIC OUTPUTS
5
Slope Current, IY
f< = 1 MHz
0.96
1.0
1.04
0.98
1.0
1.02
0.98
1.0
1.02
mA
f = 30 MHz
0.88
0.94
1.00
0.91
0.94
0.97
0.91
0.94
0.97
mA
f = 60 MHz
0.82
0.90
0.98
0.86
0.90
0.94
0.86
0.90
0.94
mA
f = 90 MHz
0.88
mA
f = 120 MHz
0.85
mA
Intercept, Dual AD640s
10, 11
f< = 1 MHz
–90.6
–88.6
–86.6
–89.6
–88.6
–87.6
–89.6
–88.6
–87.6
dBm
f = 30 MHz
–87.6
dBm
f = 60 MHz
–86.3
dBm
f = 90 MHz
–83.9
dBm
f = 120 MHz
–80.3
dBm
AC LINEARITY
–40 dBm to –2 dBm
12
f = 1 MHz
0.5
2.0
0.5
1.0
0.5
1.0
dB
–35 dBm to –10 dBm
12
f = 1 MHz
0.25
1.0
0.25
0.5
0.25
0.5
dB
–75 dBm to 0 dBm
10
f = 1 MHz
0.75
3.0
0.75
1.5
0.75
1.5
dB
–70 dBm to –10 dBm
10
f = 1 MHz
0.5
2.0
0.5
1.0
0.5
1.0
dB
–75 dBm to +15 dBm
13
f = 10 kHz
0.5
3.0
0.5
1.5
0.5
1.5
dB
PACKAGE OPTION
20-Lead Ceramic DIP Package (D)
AD640BD
AD640TD
20-Terminal Ceramic LCC (E)
AD640BE
AD640TE
20-Lead Plastic DIP Package (N)
AD640]N
20-Lead Plastic Leaded Chip Carrier (P)
AD640JP
AD640BP
NUMBER OF TRANSISTORS
155
NOTES
1Logarithms to base 10 are used throughout. The response is independent of the sign of V
IN.
2Attenuation ratio trimmed to calibrate intercept to 10 mV when in use. It has a temperature coefficient of +0.30%/
°C.
3Overall gain is trimmed using a
± 200 V square wave at 2 kHz, corrected for the onset of compression.
4The fully limited signal output will appear to be a square wave; its amplitude is proportional to absolute temperature.
5Currents defined as flowing into Pin 14. See FUNDAMENTALS OF LOGARITHMIC CONVERSION for full explanation of scaling concepts. Slope is measured
by linear regression over central region of transfer function.
6The logarithmic intercept in dBV (decibels relative to 1 V) is defined as 20 LOG
10 (VX/1 V).
7The zero-signal current is a function of temperature unless internal temperature compensation (ITC) pin is grounded.
8Operating in circuit of Figure 24 using
± 0.1% accurate values for R
LA and RLB. Includes slope and nonlinearity errors. Input offset errors also included for
VIN >3 mV dc, and over the full input range in ac applications.
9Essentially independent of supply voltages.
10Using the circuit of Figure 27, using cascaded AD640s and offset nulling. Input is sinusoidal, 0 dBm in 50
= 223 mV rms.
11For a sinusoidal signal (see EFFECT OF WAVEFORM ON INTERCEPT). Pin 8 on second AD640 must be grounded to ensure temperature stability of intercept
for dual AD640 system.
12Using the circuit of Figure 24, using single AD640 and offset nulling. Input is sinusoidal, 0 dBm in 50
= 223 mV rms.
13Using the circuit of Figure 32, using cascaded AD640s and attenuator. Square wave input.
All min and max specifications are guaranteed, but only those in boldface are 100% tested on all production units. Results from those tests are used to calculate
outgoing quality levels.
Specifications subject to change without notice.
THERMAL CHARACTERISTICS
JC ( C/W)
JA ( C/W)
20-Lead Ceramic DIP Package (D-20)
25
85
20-Terminal Ceramic LCC (E-20A)
25
85
20-Lead Plastic DIP Package (N-20)
24
61
20-Lead Plastic Leaded Chip Carrier (P-20A)
28
75
AD640
REV. C
–3–
(VS =
5 V, TA = +25 C, unless otherwise noted)
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參數(shù)描述
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