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參數(shù)資料
| 型號： | AD606 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 運動控制電子 |
| 英文描述： | 50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output(50MHz,帶限幅輸出80dB解調(diào)對數(shù)放大器) |
| 中文描述： | 50兆赫，80分貝限解調(diào)與輸出（50MHz時，帶限幅輸出80dB的對數(shù)放大器，解調(diào)對數(shù)放大器） |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 474K |
| 代理商： | AD606 |
AD606
REV. 0
–6–
of the dynamic range in the case where the offset voltage of the
first stage should be high enough to cause later stages to prema-
turely enter limiting, because of the high dc gain (about 8000)
of the main amplifier system. For example, an offset voltage of
only 20
μ
V would become 160 mV at the output of the last stage
in the main amplifier (before the final limiter section), driving
the last stage well into limiting. In the absence of noise, this lim-
iting would simply result in the logarithmic output ceasing to
become any lower below a certain signal level at the input. The
offset would also degrade the logarithmic conformance in this
region. In practice, the finite noise of the first stage also plays a
role in this regard, even if the dc offset were zero.
Figure 3 shows a representation of this loop, reduced to essen-
tials. The figure closely corresponds to the internal circuitry,
and correctly shows the input resistance. Thus, the forward gain
of the main amplifier section is 7
×
11.15 dB, but the loop gain
is lowered because of the attenuation in the network formed by
+1
CF1
30pF
CF2
30pF
TO FINAL
LIMITER
STAGE
RF2
360k
RF1
360k
RB1
30k
RA
2.5k
RB2
30k
C
C2
C
C1
0V
C
Z
R
Z
FIL1
FIL2
+1
78dB
Figure 3. Offset Control Loop
RB1 and RB2 and the input resistance RA. The connection po-
larity is such as to result in negative feedback, which reduces the
input offset voltage by the dc loop gain, here about 50 dB, that
is, by a factor of about 316. We use a
differential
representation,
because later we will examine the consequences to the power-up
response time in the event that the ac coupling capacitors C
C1
and C
C2
do not exactly match. Note that these capacitors, as
well as forming a high-pass filter to the signal in the forward
path, also introduce a pole in the feedback path.
Internal resistors RF1 and RF2 in conjunction with grounded
capacitors CF1 and CF2 form a low-pass filter at 15 kHz. This
frequency can optionally be lowered by the addition of an exter-
nal capacitor C
Z
, and in some cases a series resistor R
Z
. This, in
conjunction with the low-pass section formed at the input cou-
pling, results in a two-pole high-pass response, falling of at
40 dB/decade below the corner frequency. The damping factor
of this filter depends on the ratio C
Z
/C
C
(when C
Z
>>C
F
) and
also on the value of R
Z
.
The inclusion of this control loop has no effect on the high frequency
response of the AD606. Nor does it have any effect on the low fre-
quency response when the input amplitude is substantially above the
input offset voltage
.
The loop’s effect is felt only at the lower end of the dynamic
range, that is, from about 80 dBm to –70 dBm, and when the
signal frequency is near the lower edge of the passband. Thus,
the small signal results which are obtained using the suggested
model are not indicative of the ac response at moderate to high
signal levels. Figure 4 shows the response of this model for the
default case (using C
C
= 100 pF and C
Z
= 0) and with C
Z
=
150 pF. In general, a
maximally flat ac
response occurs when C
Z
is roughly twice C
C
(making due allowance for the internal
30 pF capacitors). Thus, for audio applications, one can use
C
C
= 2.7
μ
F and C
Z
= 4.7
μ
F to achieve a high-pass corner
(–3 dB) at 25 Hz.
90
70
–20
100k
100M
10M
1M
10k
80
60
40
50
20
30
10
–10
0
C
Z
= 0pF
C
Z
= 150pF
INPUT FREQUENCY – Hz
R
Figure 4. Frequency Response of Offset Control Loop for
C
Z
= 0 pF and C
Z
= 150 pF (C
C
= 100 pF)
However, the maximally flat ac response is not optimal in two
special cases. First, where the RF input level is rapidly pulsed,
the fast edges will cause the loop filter to ring. Second, ringing
can also occur when using the power-up feature, and the ac cou-
pling capacitors do not exactly match in value. We will examine
the latter case in a moment. Ringing in a linear amplifier is an-
noying, but in a log amp, with its much enhanced sensitivity to
near zero signals, it can be very disruptive.
To optimize the low level accuracy, that is, achieve a highly
damped pulse response in this filter, it is recommended to in-
clude a resistor R
Z
in series with an increased value of C
Z
. Some
experimentation may be necessary, but for operation in the
range 3 MHz to 70 MHz, values of C
C
= 100 pF, C
Z
= 1 nF
and R
Z
= 2 k
are near optimal. For operation down to 100 kHz
use C
C
= 10 nF, C
Z
= 0.1
μ
F and R
Z
= 13 k
. Figure 5 shows
typical connections for the AD606 with these filter components
added.
7
8
1
2
3
4
5
6
9
10
15
16
14
13
AD606JN
I
V
I
I
C
B
O
L
L
F
F
V
P
C
I
L
12
11
C
Z
R
Z
Figure 5. Use of C
Z
and R
Z
for Offset Control Loop
Compensation
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