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參數(shù)資料
| 型號(hào)： | AD606 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output(50MHz,帶限幅輸出80dB解調(diào)對(duì)數(shù)放大器) |
| 中文描述： | 50兆赫，80分貝限解調(diào)與輸出（50MHz時(shí)，帶限幅輸出80dB的對(duì)數(shù)放大器，解調(diào)對(duì)數(shù)放大器） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 474K |
| 代理商： | AD606 |
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
50 MHz, 80 dB Demodulating
Logarithmic Amplifier with Limiter Output
AD606
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
FEATURES
Logarithmic Amplifier Performance
–75 dBm to +5 dBm Dynamic Range
≤
1.5 nV/
√
Hz
Input Noise
Usable to >50 MHz
37.5 mV/dB Voltage Output
On-Chip Low-Pass Output Filter
Limiter Performance
6
1 dB Output Flatness over 80 dB Range
6
3
8
Phase Stability at 10.7 MHz over 80 dB Range
Adjustable Output Amplitude
Low Power
+5 V Single Supply Operation
65 mW Typical Power Consumption
CMOS Compatible Power-Down to 325
m
W typ
<5
m
s Enable/Disable Time
APPLICATIONS
Ultrasound and Sonar Processing
Phase-Stable Limiting Amplifier to 100 MHz
Received Signal Strength Indicator (RSSI)
Wide Range Signal and Power Measurement
PRODUCT DESCRIPTION
The AD606 is a complete, monolithic logarithmic amplifier
using a 9-stage “successive-detection” technique. It provides
both logarithmic and limited outputs. The logarithmic output is
from a three-pole post-demodulation low-pass filter and provides
a loadable output voltage of +0.1 V dc to +4 V dc. The logarith-
mic scaling is such that the output is +0.5 V for a sinusoidal in-
put of –75 dBm and +3.5 V at an input of +5 dBm; over this
range the logarithmic linearity is typically within
±
0.4 dB. All
scaling parameters are proportional to the supply voltage.
The AD606 can operate above and below these limits, with re-
duced linearity, to provide as much as 90 dB of conversion
range. A second low-pass filter automatically nulls the input off-
set of the first stage down to the submicrovolt level. Adding ex-
ternal capacitors to both filters allows operation at input
frequencies as low as a few hertz.
The AD606’s limiter output provides a hard-limited signal out-
put as a differential current of
±
1.2 mA from open-collector
outputs. In a typical application, both of these outputs are
loaded by 200
resistors to provide a voltage gain of more than
90 dB from the input. Transition times are 1.5 ns, and the
phase is stable to within
±
3
°
at 10.7 MHz for signals from
–75 dBm to +5 dBm.
The logarithmic amplifier operates from a single +5 V supply
and typically consumes 65 mW. It is enabled by a CMOS logic
level voltage input, with a response time of <5
μ
s. When dis-
abled, the standby power is reduced to <1 mW within 5
μ
s.
The AD606J is specified for the commercial temperature range
of 0
°
C to +70
°
C and is available in 16-pin plastic DIPs or
SOICs. Consult the factory for other packages and temperature
ranges.
FUNCTIONAL BLOCK DIAGRAM
LMLO
OPCM
VLOG
BFIN
ILOG
COMM
INLO
ISUM
3
2
1
4
5
6
8
7
14
15
16
13
12
11
9
10
LADJ
FIL1
FIL2
VPOS
PRUP
COMM
LMHI
INHI
X2
AREFERENCE
LOFFSET-NULL
AD606
DHIGH-END
FINAL
9.375k
9.375k
12
μ
A/dB
M11.15 dB/STAGE
2
μ
A/dB
1.5k
30k
250
30k
X1
360k
1.5k
30pF
30pF
TFILTER
2pF
360k
OFILTER
2pF
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