參數(shù)資料
型號(hào): AD5621AKS
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package
中文描述: SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO6
封裝: PLASTIC, SC-70, MO-203AB, SURFACE MOUNT PACKAGE-6
文件頁(yè)數(shù): 17/20頁(yè)
文件大?。?/td> 599K
代理商: AD5621AKS
Preliminary Technical Data
AD5601/AD5611/AD5621
USING AD5601/AD5611/AD5621 WITH AN OPTO-
ISOLATED INTERFACE
In process-control applications in industrial environments, it is
often necessary to use an opto-isolated interface to protect and
isolate the controlling circuitry from any hazardous common-
mode voltages that might occur in the area where the DAC is
functioning. Opto-isolators provide isolation in excess of 3 kV.
Because the AD5601/AD5611/AD5621 use a 3-wire serial logic
interface, they require only three opto-isolators to provide the
required isolation (see Figure 36). The power supply to the parts
also needs to be isolated. This is done by using a transformer.
On the DAC side of the transformer, a 5 V regulator provides
the 5 V supply required for the AD5601/AD5611/AD5621.
Rev. PrC | Page 17 of 20
V
DD
0.1
μ
F
V
DD
V
DD
10k
10k
10k
+5V
REGULATOR
V
OUT
GND
0
DIN
SYNC
SCLK
POWER
10
μ
F
V
DD
SYNC
SCLK
DATA
AD5601/
AD5611/
AD5621
Figure 36. AD5601/AD5611/AD5621 with an Opto-Isolated Interface
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the
board. The printed circuit board containing the AD5601/
AD5611/AD5621 should have separate analog and digital
sections, each having its own area of the board. If the AD5601/
AD5611/AD5621 are in a system where other devices require an
AGND to DGND connection, the connection should be made
at one point only. This ground point should be as close to the
AD5601/AD5611/AD5621 as possible.
The power supply to the AD5601/AD5611/AD5621 should be
bypassed with 10 μF and 0.1 μF capacitors. The capacitors
should be physically as close as possible to the device, with the
0.1 μF capacitor ideally right up against the device. The 10 μF
capacitors are the tantalum bead type. It is important that the
0.1 μF capacitor have low effective series resistance (ESR) and
effective series inductance (ESI), such as in common ceramic
types of capacitors. This 0.1 μF capacitor provides a low
impedance path to ground for high frequencies caused by
transient currents due to internal logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and reduce glitch
effects on the supply line. Clocks and other fast switching digital
signals should be shielded from other parts of the board by
digital ground. Avoid crossover of digital and analog signals, if
possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce
feedthrough effects through the board. The best board layout
technique is the microstrip technique where the component
side of the board is dedicated to the ground plane only and the
signal traces are placed on the solder side. However, this is not
always possible with a 2-layer board.
相關(guān)PDF資料
PDF描述
AD5601BKS 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package
AD5611BKS 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package
AD5621BKS 2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package
AD5620BRJ-1500RL7 Single, 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference in SOT-23
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