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參數(shù)資料
| 型號： | AD5520JSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PPMU SNGL-CH 64-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 每引腳參數(shù)測量單元（PPMU） |
| 應(yīng)用： | 自動測試設(shè)備 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5520EBZ-ND - BOARD EVAL FOR AD5520 |
AD5520
Rev. B | Page 18 of 24
SETTLING TIME CONSIDERATIONS
Fast throughput is a key requirement in automatic test
equipment because it relates directly to the cost of manufac-
turing the DUT; thus reducing the time required to make a
measurement is of greatest importance. When taking
measurements using a PMU, the limiting factor is usually the
time it takes the output to settle to the required accuracy so a
measurement can be taken. DUT capacitance, measurement
accuracy, and the design of the PMU are the major contributors
to this time.
Figure 26 shows a simplified block diagram of the AD5520
PMU. In brief, the device consists of a force control amplifier,
access to a number of selectable sense resistors, a voltage
measure instrumentation amplifier, and a current measure
instrumentation amplifier. To optimize the performance of the
device, there are also nodes provided where external compensa-
tion capacitors are added. As mentioned, making an accurate
measurement in the fastest time while avoiding overshoots and
ringing is the key requirement in any automatic test equipment
(ATE) system. Doing so provides challenges, however. The
external compensation capacitors set up different settling times
or bandwidths on the force control amplifier, and while one
compensation capacitor value may suit one range, it may not
suit other ranges. To optimize measurement performance and
speed, differences in signal behavior on each range and
frequency of use of each range need to be taken into account.
When selecting a faster settling time, there is a trade-off.
A small compensation value results in faster settling, but
may incur penalties in overshoots or ringing at the DUT.
Compensation capacitor selection should be optimized to
ensure minimum overshoots while still giving decent settling
time performance.
While careful selection of the compensation capacitor is
required to minimize the settling time, another factor can
greatly contribute to the overall settling of the loop if the
feedback loop is broken in some manner, and the force control
amplifier goes to either the positive or negative rails. There is a
finite amount of time required for the amplifier to recover from
this condition, typically 85 μs, which adds to the settling of the
loop. Ensuring that the force control amplifier never goes into
saturation is the best solution. This solution can be helped by
putting the device into standby mode any time the operating
mode or range selection is changed. In addition, ensure that the
selected output range can supply the required current needed by
the DUT.
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