參數(shù)資料
型號: AD5370BCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 11/29頁
文件大小: 0K
描述: IC DAC 16BIT 40CH SERIAL 64LFCSP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: 40 Channels of Programmable Output Span Using AD5371 (CN0149)
標(biāo)準(zhǔn)包裝: 750
設(shè)置時間: 20µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 40
電壓電源: 雙 ±
功率耗散(最大): 610mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 40 電壓,單極;40 電壓,雙極
AD5370
Rev. 0 | Page 18 of 28
Reference Selection Example
If
Nominal Output Range = 12 V (4 V to +8 V)
Zero-Scale Error = ±70 mV
Gain Error = ±3%
SIGGND = AGND = 0 V
Then
Gain Error = ±3%
=> Maximum Positive Gain Error = +3%
=> Output Range Including Gain Error = 12 + 0.03(12) =
12.36 V
Offset Error = ±70 mV
=> Maximum Offset Error Span = 2(70 mV) = 0.14 V
=> Output Range Including Gain Error and Offset Error =
12.36 V + 0.14 V = 12.5 V
VREF Calculation
Actual Output Range = 12.5 V, that is, 4.25 V to +8.25 V;
VREF = (8.25 V + 4.25 V)/4 = 3.125 V
If the equation yields an inconvenient reference level, the user
can adopt one of the following approaches:
Use a resistor divider to divide down a convenient, higher
reference level to the required level.
Select a convenient reference level above VREF, and modify
the gain and offset registers to downsize the reference digitally.
In this way, the user can use almost any convenient reference
level but may reduce the performance by overcompaction
of the transfer function.
Use a combination of these two approaches.
CALIBRATION
The user can perform a system calibration on the AD5370 to
reduce gain and offset errors to below 1 LSB. This is achieved
by calculating new values for the M and C registers and reprogram-
ming them.
Reducing Zero-Scale Error
Zero-scale error can be reduced as follows:
1.
Set the output to the lowest possible value.
2.
Measure the actual output voltage and compare it with the
required value. This gives the zero-scale error.
3.
Calculate the number of LSBs equivalent to the error and
add this from the default value of the C register. Note that
only negative zero-scale error can be reduced.
Reducing Full-scale Error
Full-scale error can be reduced as follows:
1.
Measure the zero-scale error.
2.
Set the output to the highest possible value.
3.
Measure the actual output voltage and compare it with the
required value. Add this error to the zero-scale error. This
is the span error, which includes the full-scale error.
4.
Calculate the number of LSBs equivalent to the full-scale
error and subtract it from the default value of the M register.
Note that only positive full-scale error can be reduced.
5.
The M and C registers should not be programmed until
both zero-scale and full-scale errors have been calculated.
AD5370 Calibration Example
This example assumes that a 4 V to +8 V output is required.
The DAC output is set to 4 V but measured at 4.03 V. This
gives a zero-scale error of 30 mV.
1.
1 LSB = 12 V/65,536 = 183.11 μV
2.
30 mV = 164 LSB
The full-scale error can now be calculated. The output is set to
+8 V and a value of +8.02 V is measured. The full-scale error is
+20 mV – (–30 mV) = +50 mV.
50 mV = 273 LSBs
The errors can now be removed.
1.
164 LSB should be added to the default C register value,
that is (32,768 + 164) = 32,932.
2.
273 LSB should be subtracted from the default M register
value; that is, (65,535 273) = 65,262.
3.
65,262 should be programmed to the M register and 32,932
should be programmed to the C register.
ADDITIONAL CALIBRATION
The techniques described in the previous section are usually
enough to reduce the zero-scale and full-scale errors in most
applications. However, there are limitations whereby the errors
may not be sufficiently removed. For example, the offset (C)
register can only be used to reduce the offset caused by the
negative zero-scale error. A positive offset cannot be reduced.
Likewise, if the maximum voltage is below the ideal value, that
is, a negative full-scale error, the gain (M) register cannot be
used to increase the gain to compensate for the error.
These limitations can be overcome by increasing the reference
value. With a 3 V reference, a 12 V span is achieved. The ideal
voltage range for the AD5370 is 4 V to +8 V. Using a 3.1 V
reference increases the range to 4.133 V to +8.2667 V. Clearly,
in this case, the offset and gain errors are insignificant, and the
M and C registers can be used to raise the negative voltage to
4 V and then reduce the maximum voltage to +8 V to give the
most accurate values possible.
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