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參數(shù)資料
| 型號： | AD5310BRTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT R-R W/BUFF SOT23-6 |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 3,000 |
| 設置時間： | 6µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1.25mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應商設備封裝： | SOT-23-6 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 167k |
Data Sheet
AD5310
Rev. B | Page 15 of 16
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the board.
The printed circuit board containing the AD5310 should have
separate analog and digital sections, each having their own area
of the board. If the AD5310 is in a system where other devices
require an AGND to DGND connection, the connection should
be made at one point only. This ground point should be as close
as possible to the AD5310.
The power supply to the AD5310 should be bypassed with 10 F
and 0.1 F capacitors. The capacitors should be physically as
close as possible to the device, with the 0.1 F capacitor ideally
right up against the device. The 10 F capacitors are the tantalum
bead type. It is important that the 0.1 F capacitor has low effective
series resistance (ESR) and effective series inductance (ESI), such
as is the case with common ceramic types of capacitors. This
0.1 F capacitor provides a low impedance path to ground for
high frequencies caused by transient currents due to internal
logic switching.
The power supply line itself should have as large a trace as possible
to provide a low impedance path and to reduce glitch effects on
the supply line. Clocks and other fast switching digital signals
should be shielded from other parts of the board by digital
ground. Avoid crossover of digital and analog signals if possible.
When traces cross on opposite sides of the board, ensure that they
run at right angles to each other to reduce feedthrough effects
through the board. The best board layout technique is the micro-
strip technique, where the component side of the board is
dedicated to the ground plane only and the signal traces are
placed on the solder side. However, this is not always possible
with a 2-layer board.
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