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參數(shù)資料
| 型號： | AD5100 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | System-Management IC with Programmable Quad Voltage Monitoring and Supervisory Functions |
| 中文描述： | 系統(tǒng)管理IC與可編程四路電壓監(jiān)測和監(jiān)督職能 |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 495K |
| 代理商： | AD5100 |
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Preliminary Technical Data
AD5100
Digital Interface
Rev. PrJ | Page 21 of 32
All programmable parameters are set through a 2-wire I
2
C
protocol with read/write access to the registers. All
programmable parameters can be set permanently by
blowing the OTP fuses at users’ factories. Analog Devices
offers device programming software, which effectively
replaces the need for external I
2
C controllers or host
processors for OTP programming in the factories.
SCL
Serial Input Register Clock Pin. Shifts in one bit at a time on
positive clock edges. External 1k-2.2k
Ω
pull-up resistor is
needed. The pull-up resistor should tie to V
3MON
if it is used
to monitor a sub-5V source.
SDA
Serial Data Input/Output Pin. Shifts in one bit at a time on
positive clock edges. MSB loaded first. External 1k-2.2k
Ω
pull-up resistor is needed. The pull-up resistor should tie to
V
3MON
if it is used to monitor a sub-5V source.
AD0
I2C Slave Address Pin. AD5100 is a slave device that will
communicate with a master if the AD0 bit in the protocol
matches with the logic state of the AD5100’s AD0 pin. Table 8
and Figure 20 show the example with two AD5100 devices
operate on the same serial bus independently.
Table 8. Slave Address Decoding Scheme
AD0
Program
ming Bit
Pin
0
0V
AD0
Device
Device
Address
ed
0x2E
(U1)
0x2F
(U2)
1
5V
Figure 20. Two AD5100 Devices on One Bus
The master-device output bus-line drivers are open-drain pull-
downs in a fully I
2
C compatible interface.
AD5100 Register Map
Table 9 outlines the Address Pointer Registers used to configure
and control all parameters and functions in the AD5100. Table
10 shows the Address Pointer Register Structure. Table 9 also
outlines if registers are writable, readable, or permanently
settable. All registers are single-port, meaning they have the
same address for read and write operations. The AD5100 ships
from its manufacturing factory with default power-up values as
listed in the last column. The user can experiment with
different settings in the various threshold, delay and
configuration registers. Once enough evaluation is done, the
user can program their own power-up default values via a one
time program (OTP) feature. When all desired settings have
been programmed (or the user is satisfied with the
manufacturers defaults), a lock-out bit can be set to prevent
further/erroneous settings from being programmed.
Some users will use the AD5100 as a ‘set and forget’ device, i.e.
program some default values and never need to change these
over the life of the application. However some users will require
‘On the Fly’ flexibility, i.e. the ability to change settings to values
other than those they choose as their defaults. An additional
feature of the AD5100 is the ability to temporarily over-ride the
OTP executed settings and still allows users to program the
parts dynamically in the field. All over-ride values will revert
back to OTP executed settings once the AD5100 is power
cycled.
Register Writing, Reading, OTP & Over-Ride are explained
later in the I2C section.
MASTER
SDA SCL
AD0
AD5100
SDA
SCL
AD0
AD5100
U2
SDA
SCL
5V
Rp
Rp
5V
U1
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