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參數(shù)資料
| 型號： | AD5100 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | System-Management IC with Programmable Quad Voltage Monitoring and Supervisory Functions |
| 中文描述： | 系統(tǒng)管理IC與可編程四路電壓監(jiān)測和監(jiān)督職能 |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 495K |
| 代理商： | AD5100 |
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Preliminary Technical Data
AD5100
Outputs
Shutdown Generator
Rev. PrJ | Page 17 of 32
The shutdown output, SHDN , is triggered by the abnormal
inputs of V
1MON
or V
2MON
. It can also be the result of a failed
watchdog input. SHDN control can also be asserted low by
users through I2C programming at anytime.
To be explicit, the shutdown generator asserts a logic-low
SHDN
signal based on the
following conditions:
1.
During power-up.
2.
When V
1MON
goes over or under the threshold,
Figure 5.
3.
When V
2MON
is below the turn-on threshold during
the rising edge or the turn-off threshold during the
falling edge in the default level sensitive mode,
Figure 5.
4.
When the external monitoring processor cannot
issue the necessary WDI signal and an Advanced
WDI mode is selected, Figures 8 and 9.
5.
I2C programmed-shutdown.
The SHDN signal is released after the programmable hold
time. The SHDN output is push-pull configured with I
2
C
selectable rail voltage of either V
1MON
in default or internal
V
REG
. Figure 15 shows the SHDN output configurations, Pull-
down resistor R1 ensures SHDN is pulled to ground when
the AD5100 is not powered. When AD5100 is powered, M2a
and M2b are both on. M2a has relatively lower impedance
than M2b and R1 that the SHDN remains low at shutdown.
When the AD5100 settles, sw1 will be on. M1 is stronger
than M2a that SHDN will be pulled to the rail that makes
AD5100 out of the shutdown mode.
The AD5100 is likely be used to monitor and control power
regulators in some applications where some regulators have
the input and enable pins next to each other in fine pitch that
may pose reliability concern under some abnormal
conditions. To prevent this may happen, the AD5100
shutdown output features a smart-load detection that ensures
the shutdown to respond for maximum protection. For
example, if the car battery has not been started for an
extensive period of time and a resistive dendrite may have
formed across the SHDN and the battery terminal (V
1MON
),
the dendrite will be blown immediately as the M2a is
designed with adequate current sinking capability and
remains in the on position to offer such protection. In
another situation where the SHDN pin may be hard-shorted
to any sub-30V source, the short-circuit detector will open
sw2 and therefore limit the current by the high impedance
M2b.
Figure 15. Shutdown Output. # = I
2
C Selectable, * = Default.
Reset Generator
The Reset output, RESET , is triggered by the abnormal input
of V
3MON
or V
4MON
. RESET activation can also be the result of
the processor that is not generating the proper watchdog
signal or the Manual Reset is triggered.
To be explicit, the Reset generator asserts a logic-low RESET
signal based on the following conditions
1.
During power up
2.
When V
3MON
drops below the threshold, Figure 8.
3.
When V
4MON
drops below the threshold, Figure 10.
4.
When SHDN output is asserted, Figures 5 and 13.
5.
When the external monitoring processor cannot
issue the necessary WDI signal, Figures 12 and 13.
6.
When MR is asserted, Figure 14.
The RESET signal is asserted and maintained except when it
is triggered by the WDI that will be described in the
watchdog section. The RESET signal is released after the
programmable hold time.
As shown in Figure 16, The RESET output is push-pull
configured with the the rail voltage of V
3MON
.
Figure 16. Reset Output.
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