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參數(shù)資料
| 型號： | AD5062 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Full Accurate 14/16 Bit Vout nanoDac Buffered, 3V/5V, Sot 23 |
| 中文描述： | 全面準(zhǔn)確14/16輸出電壓nanoDAC系列緩沖，3V/5V，索23位 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 829K |
| 代理商： | AD5062 |
AD5040/5060
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION
DESCRIPTION
Rev. PrC | Page 6 of 17
Figure 2. AD5063 8 ld SOT23
Table 2. Pin Function Descriptions
Mnemonic
Function
V
DD
Power Supply Input. These parts can be operated from +2.5 V to +5.5 V and V
DD
should be decoupled to GND.
REF
Reference Voltage Input.
DacGND
Ground input to the DAC.
V
OUT
Analog output voltage from DAC.
Level triggered control input (active low). This is the frame synchronization signal for the input data. When
SYNC
goes low,
it enables the input shift register and data is transferred in on the falling edges of the following clocks. The DAC is updated
following the 16th clock cycle unless
SYNC
is taken high before this edge in which case the rising edge of
SYNC
acts as an
interrupt and the write sequence is ignored by the DAC.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be
transferred at rates up to 30 MHz.
Serial Data Input. This device has a 24 bit shift register. Data is clocked into the register on the falling edge of the serial clock
input.
AGND
Ground reference point for Analog circuitry on the part.
SYNC
SCLK
D
IN
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