參數(shù)資料
型號(hào)： AD1895AYRSRL
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： 192 kHz Stereo Asynchronous Sample Rate Converter
中文描述： SPECIALTY CONSUMER CIRCUIT, PDSO28
封裝： PLASTIC, MO-150AH, SSOP-28
文件頁(yè)數(shù)： 22/24頁(yè)
文件大小： 816K
代理商： AD1895AYRSRL
REV. A
AD1895
–22–
Serial Data Port Master Clock Modes
Either of the AD1895 serial ports can be configured as a master
serial data port. However, only one serial port can be a master
while the other has to be a slave. In master mode, the AD1895
requires a 256
×
f
S
, 512 f
S
or 768
×
f
S
master clock (MCLK_I).
For a maximum master clock frequency of 30 MHz, the maxi-
mum sample rate is limited to 96 kHz. In slave mode, sample
rates up to 192 kHz can be handled.
When either of the serial ports is operated in master mode, the
master clock is divided down to derive the associated left/
right subframe clock (LRCLK) and serial bit clock (SCLK).
The master clock frequency can be selected for 256, 512, or 768
times the input or output sample rate. Both the input and out-
put serial ports will support master mode LRCLK and SCLK
generation for all serial modes, Left Justified, I
2
S, Right Justified,
and TDM for the output serial port.
Table IV. Serial Data Port Clock Modes
MMODE_0/1/2
Interface Format
2
1
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Both Serial Ports are in Slave Mode
Output Serial Port is Master with 768
×
f
S_OUT
Output Serial Port is Master with 512
×
f
S_OUT
Output Serial Port is Master with 256
×
f
S_OUT
Undefined
Input Serial Port is Master with 768
×
f
S_IN
Input Serial Port is Master with 512
×
f
S_IN
Input Serial Port is Master with 256
×
f
S_IN
Bypass Mode
When the BYPASS pin is asserted high, the input data bypasses
the sample rate converter and is sent directly to the serial output
port. Dithering of the output data when the word length is set
to less than 24 bits is disabled. This mode is ideal when the
input and output sample rates are the same and LRCLK_I and
LRCLK_O are synchronous with respect to each other. This
mode can also be used for passing through non-AUDIO data
since no processing is performed on the input data in this mode.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD1895AYRSZ 功能描述:IC CONV SAMPLE RATE ASYNC 28SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
AD1895AYRSZRL 功能描述:IC SAMP-RATEHP/CONV 24BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
AD1895YRS 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC S - Bulk
AD1895YRSRL 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC S - Bulk
AD1896 制造商:AD 制造商全稱:Analog Devices 功能描述:192 kHz Stereo Asynchronous Sample Rate Converter
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