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參數(shù)資料
| 型號(hào)： | AD1843JST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Serial-Port 16-Bit SoundComm Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁(yè)數(shù)： | 17/64頁(yè) |
| 文件大?。?/td> | 848K |
| 代理商： | AD1843JST |
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AD1843
REV. 0
–17–
LINE IN
MIC IN RIGHT
MIC IN LEFT
AUX1 IN
AUX2 IN
AUX3 IN
MONO IN
SUM IN
LINE1 OUT
HEADPHONE OUT
LINE2 OUT RIGHT
LINE2 OUT LEFT
MONO OUT
SYNC2
CONV1
BIT1
SERIAL
INTERFACE
DAA
SERIAL
INTERFACE
ADSP-21xx
DSP OR ASIC
AD1843 SOUNDCOMM
CODEC
IDMA PORT
OR PARALLEL
PORT
NTSC
HORIZONTAL
SYNC SIGNAL
HOST BUS
ISA OR PCI
EXTERNAL POWERED
MULTIMEDIA SPEAKERS
SPEAKERPHONE
AUDIO FROM DAT
OR CASSETTE
PC SPEAKER
PSTN
AUDIO FROM
EXTERNAL MPEG
DECODER
PC ATTENTION
“BEEPER” SIGNAL
AUDIO FROM
CD-ROM
EXTERNAL
WAVEFORM
SYNTHESIZER
Figure 6. Typical Configurations
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
512 BITS
MSB
MSB
MSB
MSB
512 BITS
256 BITS
256 BITS
SLOT 15
SLOT 0
SLOT 15
SLOT 0
SLOT 31
SLOT 16
SLOT 16
256 BITS
256 BITS
SAMPLE PERIOD N
SAMPLE PERIOD N+1
SAMPLE PERIOD N+2
SAMPLE
PERIOD N+3
FRAME M
FRAME M+1
SDI OR SDO
SCLK
SDFS
FRS = 0 [DEFAULT 32 SLOTS PER FRAME, 2 SAMPLES PER FRAME SYNC]
MASTER MODE
NOTE THAT AD1843 FRAME RATE IS NOT RELATED TO SAMPLE RATES
Figure 7. FRS = 0, Master Mode Timing
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
3
2
1
0
15 14 13 12
256 BITS
FRAME M+2
MSB
MSB
MSB
MSB
256 BITS
FRAME M
SLOT 15
SLOT 0
SLOT 15
SLOT 0
SLOT 15
SLOT 0
SLOT 0
SAMPLE PERIOD N
SAMPLE PERIOD N+1
SAMPLE PERIOD N+2
SAMPLE
PERIOD N+3
SDI OR SDO
SCLK
SDFS
FRS = 1 [16 SLOTS PER FRAME, 1 SAMPLE PER FRAME SYNC]
MASTER MODE
NOTE THAT SCLK CAN BE PROGRAMMED FOR EITHER 12.288 MHz
OR 16.384 MHz WHEN IN MASTER MODE
256 BITS
FRAME M+1
FRAME M+3
Figure 8. FRS = 1, Master Mode Timing
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