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參數(shù)資料
| 型號： | A54SX08A-3CQ208M |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | SX-A Family FPGAs |
| 中文描述： | 的SX - A系列FPGA的 |
| 文件頁數(shù)： | 32/108頁 |
| 文件大?。?/td> | 720K |
| 代理商： | A54SX08A-3CQ208M |
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SX-A Family FPGAs
2-12
v5.1
Theta-JA
Junction-to-ambient thermal resistance (
θ
JA
) is determined under standard conditions specified by JESD-51 series but
has little relevance in actual performance of the product in real application. It should be employed with caution but is
useful for comparing the thermal performance of one package to another.
A sample calculation to estimate the absolute maximum power dissipation allowed (worst case) for a 329-pin PBGA
package at still air is as follows. i.e.:
EQ 2-11
The device's power consumption must be lower than the calculated maximum power dissipation by the package.
The power consumption of a device can be calculated using the Actel power calculator. If the power consumption is
higher than the device's maximum allowable power dissipation, then a heat sink can be attached on top of the case or
the airflow inside the system must be increased.
Theta-JC
Junction-to-case thermal resistance (
θ
JC
) measures the ability of a device to dissipate heat from the surface of the chip
to the top or bottom surface of the package. It is applicable for packages used with external heat sinks and only
applies to situations where all or nearly all of the heat is dissipated through the surface in consideration. If the power
consumption is higher than the calculated maximum power dissipation of the package, then a heat sink is required.
Calculation for Heat Sink
For example, in a design implemented in a FG484 package, the power consumption value using the power calculator is
3.00 W. The user-dependent data
T
J
and
T
A
are given as follows:
From the datasheet:
EQ 2-12
The 2.22 W power is less than then required 3.00 W; therefore, the design requires a heat sink or the airflow where the
device is mounted should be increased. The design's junction-to-air thermal resistance requirement can be estimated
by:
EQ 2-13
θ
JA
T
A
= 17.1°C/W is taken from
Table 2-12 on page 2-11
= 125°C is the maximum limit of ambient (from the datasheet)
Max. Allowed Power
--------------------------------------------------–
θ
JA
17.1
°
C/W
C
-----------------–
1.46 W
=
=
=
T
J
T
A
=
110°C
=
70°C
θ
JA
=
18.0°C/W
θ
JC
=
3.2 °C/W
P
--------------------------------------------------–
θ
JA
18.0
°
C/W
C
-----------------–
2.22 W
=
=
=
θ
JA
--------------------------------------------------–
P
-----------------–
C
3.00 W
13.33
°
C/W
=
=
=
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX08A-3FG208 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
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