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參數(shù)資料
| 型號： | A54SX08A-3CQ208M |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | SX-A Family FPGAs |
| 中文描述： | 的SX - A系列FPGA的 |
| 文件頁數(shù)： | 28/108頁 |
| 文件大?。?/td> | 720K |
| 代理商： | A54SX08A-3CQ208M |
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SX-A Family FPGAs
2-8
v5.1
Power Dissipation
A critical element of system reliability is the ability of electronic devices to safely dissipate the heat generated during
operation. The thermal characteristics of a circuit depend on the device and package used, the operating temperature,
the operating current, and the system's ability to dissipate heat.
A complete power evaluation should be performed early in the design process to help identify potential heat-related
problems in the system and to prevent the system from exceeding the device’s maximum allowed junction
temperature.
The actual power dissipated by most applications is significantly lower than the power the package can dissipate.
However, a thermal analysis should be performed for all projects. To perform a power evaluation, follow these steps:
1. Estimate the power consumption of the application.
2. Calculate the maximum power allowed for the device and package.
3. Compare the estimated power and maximum power values.
Estimating Power Dissipation
The total power dissipation for the SX-A family is the sum of the DC power dissipation and the AC power dissipation:
P
Total
= P
DC
+ P
AC
EQ 2-5
DC Power Dissipation
The power due to standby current is typically a small component of the overall power. An estimation of DC power
dissipation under typical conditions is given by:
P
DC
= I
Standby
* V
CCA
EQ 2-6
Note: For other combinations of temperature and voltage settings, refer to the
Calculator.
AC Power Dissipation
The power dissipation of the SX-A family is usually dominated by the dynamic power dissipation. Dynamic power
dissipation is a function of frequency, equivalent capacitance, and power supply voltage. The AC power dissipation is
defined as follows:
P
AC
=
P
C-cells
+ P
R-cells
+ P
CLKA
+ P
CLKB
+ P
HCLK
+ P
Output Buffer
+ P
Input Buffer
EQ 2-7
or:
EQ 2-8
P
AC
=
V
CCA2
* [(m * C
EQCM
* fm)
C-cells
+ (m * C
EQSM
* fm)
R-cells
+ (n * C
EQI
* f
n
)
Input Buffer
+ (p * (C
EQO
+ C
L
) * f
p
)
Output Buffer
+ (0.5 * (q
1
* C
EQCR
* f
q1
) + (r
1
* f
q1
))
CLKA
+ (0.5 * (q
2
* C
EQCR
* f
q2
)+ (r
2
* f
q2
))
CLKB
+ (0.5 * (s
1
* C
EQHV
* f
s1
) +
(C
EQHF
* f
s1
))
HCLK
]
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|---|---|
| A54SX16A-3CQ208M | SX-A Family FPGAs |
| A54SX72A-3CQ208M | SX-A Family FPGAs |
| A54SX32A-3CQ208M | SX-A Family FPGAs |
| A54SX16A-FFG208 | SX-A Family FPGAs |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX08A-3FG208 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
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