ProASIC3L Low Power Flash FPGAs
Revision 13
2-101
Timing Characteristics
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Table 2-176 LVDS – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Pro I/O Banks
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
0.59
1.65
0.04
2.18
ns
–1
0.50
1.40
0.03
1.85
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-177 LVDS – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Advanced I/O Banks
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
0.54
1.65
0.04
1.44
ns
–1
0.46
1.40
0.03
1.23
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-178 LVDS – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Applicable to Pro I/O Banks
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
0.77
1.68
0.05
2.18
ns
–1
0.66
1.43
0.04
1.85
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-179 LVDS – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Applicable to Advanced I/O Banks
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
0.70
1.65
0.05
1.44
ns
–1
0.60
1.40
0.04
1.23
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.