參數(shù)資料
型號(hào)： A3P125-PQG208II
元件分類(lèi)： FPGA
英文描述： FPGA, 3072 CLBS, 125000 GATES, 350 MHz, PQFP208
封裝： 28 X 28 MM, 3.40 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, QFP-208
文件頁(yè)數(shù)： 26/49頁(yè)
文件大?。?/td> 5893K
代理商： A3P125-PQG208II
ProASIC3 DC and Switching Characteristics
v1.3
2 - 105
v1.0
(continued)
In Table 2-106 ProASIC3 CCC/PLL Specification, the SCLK parameter and note 1
are new.
Table 2-116 JTAG 1532 was populated with the parameter data, which was not
in the previous version of the document.
v2.2
(July 2007)
This document was previously in datasheet v2.2. As a result of moving to the
handbook format, Actel restarted the version numbers so the new version
number is v1.0.
N/A
v2.1
(May 2007)
The TJ parameter in Table 3-2 Recommended Operating Conditions was
changed to TA, ambient temperature, and table notes 4–6 were added.
3-2
v2.0
(April 2007)
Table
3-5 Package
Thermal
Resistivities
was
updated
with
A3P1000
information. The note below the table is also new.
3-5
Advance v0.7
(January 2007)
The timing characteristics tables were updated.
N/A
The "PLL Macro" section was updated to add information on the VCO and PLL
outputs during power-up.
2-15
The "PLL Macro" section was updated to include power-up information.
2-15
Table 2-11 ProASIC3 CCC/PLL Specification was updated.
2-29
Figure 2-19 Peak-to-Peak Jitter Definition is new.
2-18
The "SRAM and FIFO" section was updated with operation and timing
requirement information.
2-21
The "RESET" section was updated with read and write information.
2-25
The "RESET" section was updated with read and write information.
2-25
The "Introduction" in the "Advanced I/Os" section was updated to include
information on input and output buffers being disabled.
2-28
PCI-X 3.3 V was added to Table 2-11 VCCI Voltages and Compatible Standards.
2-29
In the Table 2-15 Levels of Hot-Swap Support, the ProASIC3 compliance
descriptions were updated for levels 3 and 4.
2-34
Table 2-43 I/O Hot-Swap and 5 V Input Tolerance Capabilities in ProASIC3
Devices was updated.
2-64
Notes 3, 4, and 5 were added to Table 2-17 Comparison Table for 5 V–
Compliant Receiver Scheme. 5 x 52.72 was changed to 52.7 and the Maximum
current was updated from 4 x 52.7 to 5 x 52.7.
2-40
The "VCCPLF PLL Supply Voltage" section was updated.
2-50
The "VPUMP Programming Supply Voltage" section was updated.
2-50
The "GL Globals" section was updated to include information about direct input
into quadrant clocks.
2-51
VJTAG was deleted from the "TCK Test Clock" section.
2-51
In Table 2-22 Recommended Tie-Off Values for the TCK and TRST Pins, TSK
was changed to TCK in note 2. Note 3 was also updated.
2-51
Ambient was deleted from Table 3-2 Recommended Operating Conditions.
VPUMP programming mode was changed from "3.0 to 3.6" to "3.15 to 3.45".
3-2
Note 3 is new in Table 3-4 Overshoot and Undershoot Limits (as measured on
quiet I/Os)1.
3-2
Previous Version
Changes in Current Version (v1.3)
Page
相關(guān)PDF資料
PDF描述
A3P125-QN132II FPGA, 3072 CLBS, 125000 GATES, 350 MHz, BCC132
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A3P125-PQG208PS53 制造商:Microsemi SOC Products Group 功能描述:ACLA3P125-PQG208PS53 125K GATES 231MHZ 1
A3P125-QNG132 功能描述:IC FPGA 1024MAC 133I/O 132QFN RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門(mén)數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱(chēng):220-1241
A3P125-QNG132I 功能描述:IC FPGA 1KB FLASH 125K 132-QFN RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門(mén)數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
A3P125-QNG132T 功能描述:IC FPGA 1KB FLASH 125K 132-QFN RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
A3P125-TQ144 功能描述:IC FPGA 1KB FLASH 125K 144-TQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ProASIC3 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門(mén)數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
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