參數(shù)資料
型號(hào)： 9S12XDP512DGV2
英文描述： Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set)
中文描述： 設(shè)備用戶指南掩模組L15Y - （二硅-增強(qiáng)的功能集）
文件頁數(shù)： 124/152頁
文件大小： 1231K
代理商： 9S12XDP512DGV2
M
MC9S12XDP512 Device User Guide — V01.12
124
A.2.3.2 3.3V Range
Table A-14
specifies the ATD conversion performance excluding any errors due to current injection,
input capacitance and source resistance.
Table A-14 ATD Conversion Performance 3.3V
A.2.3.3 ATD Accuracy Definitions
For the following definitions see also
Figure A-1
.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps.
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
NOTES
:
1. These values include the quantization error which is inherently 1/2 count for any A/D converter.
Conditions are shown in
Table A-4
unless otherwise noted
V
REF
= V
RH
- V
RL
= 3.328V. Resulting to one 8 bit count = 13mV and one 10 bit count = 3.25mV
f
ATDCLK
= 2.0MHz
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P 10-Bit Resolution
LSB
3.25
mV
2
P 10-Bit Differential Nonlinearity
DNL
–1.5
1.5
Counts
3
P 10-Bit Integral Nonlinearity
INL
–3.5
±
1.5
3.5
Counts
4
P 10-Bit Absolute Error
1
NOTES
:
1. These values include the quantization error which is inherently 1/2 count for any A/D converter.
AE
-5
±
2.5
5
Counts
5
P 8-Bit Resolution
LSB
13
mV
6
P 8-Bit Differential Nonlinearity
DNL
–0.5
0.5
Counts
7
P 8-Bit Integral Nonlinearity
INL
–1.5
±
1.0
1.5
Counts
8
P 8-Bit Absolute Error
1
AE
-2.0
±
1.5
2.0
Counts
DNL i
( )
V
i
------------------------
V
i
1
–
–
1LSB
1
–
=
INL n
DNL i
( )
i
1
=
n
∑
V
n
1LSB
V
0
–
-------------------
n
–
=
=
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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