參數(shù)資料
型號(hào)： 9S12B128DGV1
英文描述： 9S12B128 Device Guide
中文描述： 9S12B128設(shè)備指南
文件頁數(shù)： 69/128頁
文件大?。?/td> 1823K
代理商： 9S12B128DGV1
Device User Guide —9S12B128DGV1/D V01.11
69
5.3.1 I/O pins
Refer to the HCS12 Multiplexed External Bus Interface (MEBI) Block Guide for mode dependent pin
configuration of port A, B, E and K out of reset.
Refer to the PIM Block User Guide for reset configurations of all peripheral module ports.
NOTE:
For devices assembled in 80-pin QFP packages all non-bonded out pins should be
configured as outputs after reset in order to avoid current drawn from floating
inputs. Refer to
Table 2-1
for affected pins.
5.3.2 Memory
Refer to
Table 1-1
for locations of the memories depending on the operating mode after reset.
The RAM array is not automatically initialized out of reset.
5.4 Interrupts
FordetailsonthedifferentkindofinterruptsrefertotheHCS12InterruptBlockUserGuideandaccording
module Block User Guides.
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9S12C128DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MC9S12C Family Device User Guide
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9S12DP256BDGV2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
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