參數(shù)資料
型號(hào): 9LPR501YGT
廠(chǎng)商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO64
封裝: 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-64
文件頁(yè)數(shù): 22/22頁(yè)
文件大小: 210K
代理商: 9LPR501YGT
IDTTM/ICSTM
64-pin CK505 w/Fully Integrated Voltage Regulator
1118G—02/19/08
Advance Information
ICS9LPR501
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR
9
Datasheet
Intentional PCI Clock to Clock Delay
200 ps nominal steps
PCI0
PCI1
PCI2
PCI3
PCI4
PCI_F5
1.0ns
Electrical Characteristics - PCICLK/PCICLK_F
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS NOTES
Long Accuracy
ppm
see Tperiod min-max values
-300
300
ppm
1,6
33.33MHz output nominal
30.00900
ns
6
33.33MHz output spread
30.15980
ns
6
Absolute min/max period
T
abs
33.33MHz output nominal/spread
29.49100
30.65980
ns
6
Output High Voltage
V
OH
I
OH = -1 mA
2.4
V
1
Output Low Voltage
V
OL
I
OL = 1 mA
0.4
V
1
V
OH @MIN = 1.0 V
-33
mA
1
V
OH@MAX = 3.135 V
-33
mA
1
V
OL @ MIN = 1.95 V
30
mA
1
V
OL @ MAX = 0.4 V
38
mA
1
Rising Edge Slew Rate
t
SLR
Measured from 0.8 to 2.0 V
1
4
V/ns
1
Falling Edge Slew Rate
t
FLR
Measured from 2.0 to 0.8 V
1
4
V/ns
1
Duty Cycle
d
t1
V
T = 1.5 V
45
55
%
1
Skew
t
skew
V
T = 1.5 V
250
ps
1
Intentional PCI-PCI delay
t
delay
V
T = 1.5 V
ps
1,9
Jitter, Cycle to cycle
t
jcyc-cyc
V
T = 1.5 V
500
ps
1
200 nominal
Clock period
29.99100
T
period
Output High Current
I
OH
Output Low Current
I
OL
Electrical Characteristics - USB48MHz
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS NOTES
Long Accuracy
ppm
see Tperiod min-max values
-100
100
ppm
1,2
Clock period
T
period
48.00MHz output nominal
20.83125
20.83542
ns
2
Absolute min/max period
T
abs
48.00MHz output nominal
20.48130
21.18540
ns
2
Output High Voltage
V
OH
I
OH = -1 mA
2.4
V
1
Output Low Voltage
V
OL
I
OL = 1 mA
0.4
V
1
V
OH @MIN = 1.0 V
-29
mA
1
V
OH@MAX = 3.135 V
-23
mA
1
V
OL @ MIN = 1.95 V
29
mA
1
V
OL @ MAX = 0.4 V
27
mA
1
Rising Edge Slew Rate
t
SLR
Measured from 0.8 to 2.0 V
1
2
V/ns
1
Falling Edge Slew Rate
t
FLR
Measured from 2.0 to 0.8 V
1
2
V/ns
1
Duty Cycle
d
t1
V
T = 1.5 V
45
55
%
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T = 1.5 V
350
ps
1
Output High Current
I
OH
I
OL
Output Low Current
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