參數(shù)資料
型號: 9LPR501YGT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO64
封裝: 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-64
文件頁數(shù): 15/22頁
文件大?。?/td> 210K
代理商: 9LPR501YGT
22
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www.IDT.com
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800-345-7015
408-284-8200
Fax: 408-284-2775
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408-284-6578
pcclockhelp@idt.com
Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
Europe
IDT Europe, Limited
Prime House
Barnett Wood Lane
Leatherhead, Surrey
United Kingdom KT22 7DE
+44 1372 363 339
2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks
or registered trademarks used to identify products or services of their respective owners.
Printed in USA
TM
ICS9LPR501
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR
Datasheet
Revision History
Rev.
Issue Date Description
Page #
A
10/27/06
1. Updated Byte 11
2. Updated IDD to CK505 Rev 1.0 spec
Various
B
02/09/07
1. Updated M/N programming bytes, removed the +2 and +8
2. Added Byte 63 bit 1 for SATA PLL on/off
Various
C
04/03/07
Added Bytes 24-25.
20
D
04/17/07
Removed SSOP Ordering Information.
22
E
08/08/07
Release to Final.
-
F
11/06/07
Added Foot Note on SMBus.
19
G
02/19/08
1. Updated PLL3 Configuration Table.
2. Updated Power Management Table to Show Hi-z on latched inputs during PD.
11
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