參數(shù)資料
型號: 9DB1904BKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 8/18頁
文件大?。?/td> 173K
代理商: 9DB1904BKLFT
IDT
19 Output Differential Buffer for PCIe Gen2 and QPI
1607C—04/19/11
9DB1904B
19 Output Differential Buffer for PCIe Gen2 and QPI
16
SMBusTable: Control Pin Readback Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
R
Latch
Bit 6
X
Bit 5
X
Bit 4
DIF_18
Output Control
RW
Hi-Z
Enable
1
Bit 3
DIF_17
Output Control
RW
Hi-Z
Enable
1
Bit 2
DIF_16
Output Control
RW
Hi-Z
Enable
1
Bit 1
DIF_15
Output Control
RW
Hi-Z
Enable
1
Bit 0
DIF_14
Output Control
RW
Hi-Z
Enable
1
SMBusTable: PLL Operating Set Point Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
RW
Latch
Bit 1
RW
0
Bit 0
RW
1
RESERVED
Frequency Select 100M_133M#
Frequency Select B
Frequency Select A
See ICS9DB1904 1:1
PLL Programming Table
RESERVED
5
Byte 8
-
RESERVED
Byte 9
Readback -100M_133M#_LV
RESERVED
Readback
RESERVED
相關(guān)PDF資料
PDF描述
9DB1933AKLF 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
9DB1933AKLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
9DB202CGLF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB202CFLF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB202CFLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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