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參數(shù)資料
| 型號(hào)： | 9DB1904BKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 173K |
| 代理商： | 9DB1904BKLFT |
IDT
19 Output Differential Buffer for PCIe Gen2 and QPI
1607C—04/19/11
9DB1904B
19 Output Differential Buffer for PCIe Gen2 and QPI
14
SMBusTable: Reserved Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
R
1
Bit 6
R
1
Bit 5
R
1
Bit 4
R
1
Bit 3
R
1
Bit 2
R
0
Bit 1
R
1
Bit 0
R
1
SMBusTable: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
DIF_7
Output Control
RW
Hi-Z
Enable
1
Bit 6
DIF_6
Output Control
RW
Hi-Z
Enable
1
Bit 5
DIF_5
Output Control
RW
Hi-Z
Enable
1
Bit 4
DIF_4
Output Control
RW
Hi-Z
Enable
1
Bit 3
DIF_3
Output Control
RW
Hi-Z
Enable
1
Bit 2
DIF_2
Output Control
RW
Hi-Z
Enable
1
Bit 1
DIF_1
Output Control
RW
Hi-Z
Enable
1
Bit 0
DIF_0
Output Control
RW
Hi-Z
Enable
1
SMBusTable: Output and PLL BW Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
RW
High BW
Low BW
1
Bit 6
RW
Bypass
PLL
1
Bit 5
DIF_13
Output Control
RW
Hi-Z
Enable
1
Bit 4
DIF_12
Output Control
RW
Hi-Z
Enable
1
Bit 3
DIF_11
Output Control
RW
Hi-Z
Enable
1
Bit 2
DIF_10
Output Control
RW
Hi-Z
Enable
1
Bit 1
DIF_9
Output Control
RW
Hi-Z
Enable
1
Bit 0
DIF_8
Output Control
RW
Hi-Z
Enable
1
Note: Bit 7 is wired OR to the HIGH_BW# input, any 0 selects High BW
Note: Bit 6 is wired OR to the SMB_A2_PLLBYP# input, any 0 selects Fanout Bypass mode
SMBusTable: Output Enable Readback Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
R
X
Bit 6
R
X
Bit 5
R
X
Bit 4
R
X
Bit 3
R
X
Bit 2
R
X
Bit 1
R
X
Bit 0
R
X
72
see note
PLL_BW# adjust
see note
BYPASS# test mode / PLL
Byte 3
8
Byte 1
-
Byte 0
-
Reserved
-
Reserved
Readback - OE9# Input
Readback - OE8# Input
Readback
Readback - OE7# Input
Readback
Readback - OE_01234# Input
Readback
Readback - OE5# Input
Readback - OE6# Input
Readback
Readback - SMB_A2_PLLBYP# In
Readback
Readback - HIGH_BW# In
Readback
Byte 2
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
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| 9DB1933 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Nineteen Output Differential Buffer for PCIe Gen3 |
| 9DB1933AKLF | 功能描述:時(shí)鐘緩沖器 19 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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| 9DB202CF | 制造商:Integrated Device Technology Inc 功能描述:9DB202CF - Rail/Tube |
| 9DB202CFLF | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 2 HCSL Output PCIe Buffer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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