- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄223160 > 935270030157 (NXP SEMICONDUCTORS) 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | 935270030157 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48 |
| 文件頁數(shù)： | 21/53頁 |
| 文件大?。?/td> | 704K |
| 代理商： | 935270030157 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
Philips Semiconductors
SC16C650A
Universal Asynchronous Receiver/Transmitter (UART)
with 32-byte FIFO and infrared (IrDA) encoder/decoder
Product data
Rev. 03 — 13 March 2003
28 of 49
9397 750 11207
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated.
7.9 Scratchpad Register (SPR)
The SC16C650A provides a temporary data register to store 8 bits of user
information.
7.10 Enhanced Feature Register (EFR)
Enhanced features are enabled or disabled using this register.
Bits 0 through 4 provide single or dual character software ow control selection.
When the Xon1 and Xon2 and/or Xoff1 and Xoff2 modes are selected, the double
8-bit words are concatenated into two sequential numbers.
1
MSR[1]
DSR [1]
Logic0=No DSR change (normal default condition).
Logic1=The DSR input to the SC16C650A has changed state since
the last time it was read. A modem Status Interrupt will be generated.
0
MSR[0]
CTS [1]
Logic 0 = No CTS change (normal default condition).
Logic 1 = The CTS input to the SC16C650A has changed state since
the last time it was read. A modem Status Interrupt will be generated.
Table 21:
Modem Status Register bits description…continued
Bit
Symbol
Description
Table 22:
Enhanced Feature Register bits description
Bit
Symbol
Description
7
EFR[7]
Automatic CTS ow control.
Logic0=Automatic CTS ow control is disabled (normal default
condition).
Logic 1 = Enable Automatic CTS ow control. Transmission will stop
when CTS goes to a logical 1. Transmission will resume when the CTS
pin returns to a logical 0.
6
EFR[6]
Automatic RTS ow control. Automatic RTS may be used for hardware ow
control by enabling EFR[6]. When Auto-RTS is selected, an interrupt will
be generated when the receive FIFO is lled to the programmed trigger
level and RTS will go to a logic 1 at the next trigger level. RTS will return to
a logic 0 when data is unloaded below the next lower trigger level
(programmed trigger level 1). The state of this register bit changes with the
status of the hardware ow control. RTS functions normally when
hardware ow control is disabled.
0 = Automatic RTS ow control is disabled (normal default condition).
1 = Enable Automatic RTS ow control.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 937-SP-3044-031 | 4 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 937-SP-3088R-K1-031 | 8 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 940-SP-3044-031 | 4 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 940-SP-3088R-031 | 8 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
| 940-SP-361010-K1-A108 | 10 CONTACT(S), MALE, TELECOM AND DATACOM CONNECTOR, IDC, PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935270713557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP |
| 935270792551 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270792557 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270793551 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
| 935270793557 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復。