參數(shù)資料
型號(hào)： 935261475512
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PQCC84
封裝： PLASTIC, MO-047AF, SOT-189-3, LCC-84
文件頁(yè)數(shù)： 25/59頁(yè)
文件大?。?/td> 383K
代理商： 935261475512
Philips Semiconductors
Product specification
SC28L198
Octal UART for 3.3V and 5V supply voltage
1999 Jan 14
31
4:1 MULTIPLEX
“1”
“0”
NONE
1/O3a
D CLOCK
QN
D INPUT
DATA READ/WRITE
DATA IN/OUT
GPORQN
DATA BUS 3:0
GPOR R/W
GPOR
GPOD
GPOSR
1/O3b
GIN0
GIN1
4:1 MULTIPLEX
GPO PIN
8:1 MULTIPLEX
TxC1Xa
TxC16Xa
RxC16Xa
TxC16Xb
GPOR(0)
GPOR(1)
GPOR(2)
GPOR(3)
SD00526
GPOC
4
Figure 1. General Purpose Pin Control Logic
REGISTER MAPS
The registers of the SC28L198 are partitioned into two groups: those
used in controlling data channels and those used in handling the
actual data flow and status. Below is shown the general
configuration of all the register addressed. The ”Register Map
Summary” shows the configuration of the lower four bits of the
address that is the same for the individual UARTs. It also shows the
addresses for the several in the address space of UART A and
UART B that apply to the total chip configuration. The ”Register
Map Detail” shows the use of every address in the 8 bit address
space.
NOTE: The register maps for channels A and B (UARTs A and B)
contain some control registers that configure the entire chip. These
are denoted by a
symbol.
REGISTER MAP SUMMARY
Table 43. Summary Register Map, Control
Address (hex) ccc = channel
Register Name
Acronym
Read / Write
0ccc 0000 (x00)
Mode Register 0 MR0a
MR0
R/W
0ccc 0001 (x01)
Mode Register 1 MR1a
MR1
R/W
0ccc 0010 (x02)
I/O Port Configuration Reg a I/OPCRa
IOPCR
R/W
0ccc 0011 (x03)
Bid Control, Break Change
BCRBRK
R/W
0ccc 0100 (x04)
Bid Control, Change of State
BCRCOS
R/W
0ccc 0110 (x06)
Bid Control, Xon/Xoff
BCRX
R/W
0ccc 0111 (x07)
Bid Control, Address recognition
BCRA
R/W
0ccc 1000 (x08)
Xon Character Register
XonCR
R/W
0ccc 1001 (x09)
Xoff Character Register
XoffCR
R/W
0ccc 1010 (x0A)
Address Recognition Character
ARCR
R/W
0ccc 1100 (x0C)
Receiver Clock Select Register
RxCSR
R/W
0000 1101 (x0D)
Test Register
Reserved, set to 0
0ccc 1110 (x0E)
Transmitter Clock Select Register
TxCSR
R/W
0000 1111 (x0F)
Global Chip Configuration Register
GCCR
R/W
0001 1011 (x1B)
Interrupt Control Register
ICR
R/W
0001 1101 (x1D)
Watch-dog Timer Run Control
WDTRCR
R/W
0001 1111 (x1F)
Interrupt Vector Register
IVR
R/W
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