參數(shù)資料
型號： 935260699551
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP208
封裝： PLASTIC, SOT-316, SQFP-208
文件頁數(shù)： 142/148頁
文件大?。?/td> 692K
代理商： 935260699551
1998 Apr 09
93
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
Table 79 HPS, horizontal prescaler
Table 80 Selection of output gain
OFFSET
(HEX)
NAME
BIT
TYP.
DESCRIPTION
68
31 and 30
reserved
DCGX
29 to 27
RW
DC gain control of X prescaler (see Table 57): depending on the
number of active coefcients ‘2’ in the accumulation sequence and
the sequence length, the output amplitude gain has to be set to as
given in Table 80.
26 to 24
reserved
XPSC
23 to 18
RW
prescaling factor of the X PreSCaler: denes accumulation
sequence length and subsampling factor of the input data stream:
XPSC = TRUNC (NIP/NOP 1)
NOP = number of prescaler output pixel
NIP = number of qualified scaler input pixel.
XACM
17
RW
X (horizontal) prescaler Accumulation Mode of accumulating
FIR:
0: accumulating operates overlapping
1: non overlapping accumulation (must be set to bypass the
prescaler).
16
reserved
CXY
15 to 8
RW
Coefcient select for X prescaler (luminance component Y):
for DC gain compensation of prescaler the accumulated pixels can
be weighted by ‘1’ or ‘2’. CXYi denes a sequence of 8 bits, which
control the coefcients:
CXYi = 0: pixel weighted by ‘1’
CXYi = 1: pixel weighted by ‘2’
CXUV
7 to 0
RW
Coefcient select for X prescaler (colour difference signals
UV): for DC gain compensation of prescaler the accumulated
pixels can be weighted by ‘1’ or ‘2’. CXUVi denes a sequence of
8 bits, which control the coefcients:
CXUVi = 0: pixel weighted by ‘1’
CXUVi = 1: pixel weighted by ‘2’
DCGX2
DCGX1
DCGX0
GAIN
0001
001
1
2
010
1
4
011
1
8
100
1
2
101
1
4
110
1
8
111
1
16
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