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參數(shù)資料
| 型號： | 87C552 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O |
| 中文描述： | 8-BIT, OTPROM, MICROCONTROLLER |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 193K |
| 代理商： | 87C552 |
Philips Semiconductors
Product specification
87C552
80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I
2
C, PWM, capture/compare, high I/O
1998 May 01
6
PIN DESCRIPTION
(Continued)
PIN NO.
MNEMONIC
PLCC
QFP
TYPE
NAME AND FUNCTION
ALE/PROG
48
49
O
Address Latch Enable:
Latches the low byte of the address during accesses to external
memory. It is activated every six oscillator periods. During an external data memory
access, one ALE pulse is skipped. ALE can drive up to eight LS TTL inputs and handles
CMOS inputs without an external pull-up. This pin is also the program pulse input (PROG)
during EPROM programming.
EA/V
PP
49
50
I
External Access:
When EA is held at TTL level high, the CPU executes out of the internal
program ROM provided the program counter is less than 8192. When EA is held at TTL
low level, the CPU executes out of external program memory. EA is not allowed to float.
This pin also receives the 12.75V programming supply voltage (V
PP
) during EPROM
programming.
AV
REF–
58
59
I
Analog to Digital Conversion Reference Resistor:
Low-end.
AV
REF+
59
60
I
Analog to Digital Conversion Reference Resistor:
High-end.
AV
SS
60
61
I
Analog Ground
AV
DD
61
63
I
Analog Power Supply
NOTE:
1. To avoid “l(fā)atch-up” effect at power-on, the voltage on any pin at any time must not be higher or lower than V
DD
+ 0.5V or V
SS
– 0.5V,
respectively.
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an
inverting amplifier. The pins can be configured for use as an on-chip
oscillator, as shown in the logic symbol.
To drive the device from an external clock source, XTAL1 should be
driven while XTAL2 is left unconnected. There are no requirements
on the duty cycle of the external clock signal, because the input to
the internal clock circuitry is through a divide-by-two flip-flop.
However, minimum and maximum high and low times specified in
the data sheet must be observed.
RESET
A reset is accomplished by holding the RST pin high for at least two
machine cycles (24 oscillator periods), while the oscillator is running.
To insure a good power-on reset, the RST pin must be high long
enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-on, the voltage on
V
DD
and RST must come up at the same time for a proper start-up.
IDLE MODE
In the idle mode, the CPU puts itself to sleep while some of the
on-chip peripherals stay active. The instruction to invoke the idle
mode is the last instruction executed in the normal operating mode
before the idle mode is activated. The CPU contents, the on-chip
RAM, and all of the special function registers remain intact during
this mode. The idle mode can be terminated either by any enabled
interrupt (at which time the process is picked up at the interrupt
service routine and continued), or by a hardware reset which starts
the processor in the same manner as a power-on reset.
POWER-DOWN MODE
In the power-down mode, the oscillator is stopped and the
instruction to invoke power-down is the last instruction executed.
Only the contents of the on-chip RAM are preserved. A hardware
reset is the only way to terminate the power-down mode. The control
bits for the reduced power modes are in the special function register
PCON. Table 1 shows the state of the I/O ports during low current
operating modes.
Table 1. External Pin Status During Idle and Power-Down Modes
MODE
PROGRAM
MEMORY
ALE
PSEN
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PWM0/
PWM1
Idle
Internal
1
1
Data
Data
Data
Data
Data
High
Idle
External
1
1
Float
Data
Address
Data
Data
High
Power-down
Internal
0
0
Data
Data
Data
Data
Data
High
Power-down
External
0
0
Float
Data
Data
Data
Data
High
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PDF描述 |
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| 87C554 | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 87C575 | 80C51 8-bit microcontroller family(80C51 8位微控制器系列) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 87C552/BMA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| 87C554 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 87C575 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer |
| 87C576 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer |
| 87C58 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
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