參數(shù)資料
型號(hào)： 85301AGL
英文描述： 2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER
中文描述： 2:1差分至的LVPECL復(fù)用器
文件頁數(shù)： 14/19頁
文件大?。?/td> 301K
代理商： 85301AGL
85301AK
www.icst.com/products/hiperclocks.html
REV. A JANUARY 16, 2006
14
Integrated
Circuit
Systems, Inc.
ICS85301
2:1
D
IFFERENTIAL
-
TO
-LVPECL M
ULTIPLEXER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 6.
T
o calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω
load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
=
V
CC_MAX
– 1.005V
(V
CC_MAX
- V
OH_MAX
) =
1.005
For logic low, V
OUT
= V
OL_MAX
=
V
CC_MAX
– 1.78V
(V
CC_MAX
- V
OL_MAX
) =
1.78V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
– (V
- 2V))/R
[(2V - 1.005V)/50
Ω
] * 1.005V =
20mW
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
[(2V - 1.78V)/50
Ω
] * 1.78V =
7.83mW
] * (V
CC_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
Total Power Dissipation per output pair = Pd_H + Pd_L =
27.83mW
F
IGURE
6. LVPECL D
RIVER
C
IRCUIT
AND
T
ERMINATION
VOUT
Q1
VCC - 2V
RL
50
VCC
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