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| 型號(hào)： | 85301AGL |
| 英文描述： | 2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER |
| 中文描述： | 2:1差分至的LVPECL復(fù)用器 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大?。?/td> | 301K |
| 代理商： | 85301AGL |
85301AK
www.icst.com/products/hiperclocks.html
REV. A JANUARY 16, 2006
10
Integrated
Circuit
Systems, Inc.
ICS85301
2:1
D
IFFERENTIAL
-
TO
-LVPECL M
ULTIPLEXER
T
ERMINATION
FOR
3.3V LVPECL O
UTPUT
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50
Ω
transmission lines. Matched imped-
F
IGURE
3B. LVPECL O
UTPUT
T
ERMINATION
F
IGURE
3A. LVPECL O
UTPUT
T
ERMINATION
ance techniques should be used to maximize operating
frequency and minimize signal distortion.
Figures 3A and
3B
show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
V
CC
- 2V
50
Ω
50
Ω
RTT
Z
o
= 50
Ω
Z
o
= 50
Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH
+ V
OL
) / (V
CC
– 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o
= 50
Ω
Z
o
= 50
Ω
FOUT
FIN
I
NPUTS
:
PCLK/nPCLK I
NPUT
:
For applications not requiring the use of a differential input,
both the PCLK and nPCLK pins can be left floating. Though
not required, but for additional protection, a 1k
Ω
resistor can
be tied from PCLK to ground.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
P
INS
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| 853054AL | 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 85301AGLF | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 2-IN LVPECL 16-Pin TSSOP Tube 制造商:IDT from Components Direct 功能描述:IDT 85301AGLF CLOCK MANAGEMENT - Rail/Tube 制造商:IDT 功能描述:IDT 85301AGLF Clock Management |
| 85301AKLF | 制造商:Integrated Device Technology Inc 功能描述:Clock Multiplexer 2-IN LVPECL 16-Pin VFQFN Tube 制造商:IDT from Components Direct 功能描述:IDT 85301AKLF CLOCK MANAGEMENT - Rail/Tube 制造商:IDT 功能描述:IDT 85301AKLF Clock Management |
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| 85302-0062 | 功能描述:標(biāo)準(zhǔn)環(huán)形連接器 COAX.CABLE CONNECT.F T.FEMALE K7200631353 RoHS:否 制造商:Hirose Connector 系列:EM-W 產(chǎn)品類型:Accessories 位置/觸點(diǎn)數(shù)量:1 觸點(diǎn)類型: 觸點(diǎn)電鍍: 安裝風(fēng)格:Cable 外殼材質(zhì): 端接類型:Clamp 電壓額定值: |
| 85302-0191 | 制造商:MOLEX 功能描述: |
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