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參數(shù)資料
| 型號： | 82595FX |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER |
| 中文描述： | 1 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 32/54頁 |
| 文件大?。?/td> | 643K |
| 代理商： | 82595FX |
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82595FX
9.0
SERIAL INTERFACE
The 82595FX’s serial interface subsystem incorpo-
rates all the active circuitry required to interface the
82595FX to 10BASE-T networks or to the attach-
ment unit (AUI) interface. It includes on-chip AUI and
TPE drivers and receivers as well as Manchester
Encoder/Decoder and Clock Recovery circuitry. The
AUI port can be connected to an Ethernet Trans-
ceiver cable drop to provide a fully compliant IEEE
802.3 AUI interface. The AUI port can also be inter-
faced to a transceiver to provide a fully compliant
IEEE 802.3 10BASE2 (Cheapernet) interface. The
TPE port provides a fully compliant 10BASE-T inter-
face. The 82595FX automatically enables either the
AUI or TPE interface, depending on which medium is
active. This automatic selection can be overridden
by software configuration. The TPE interface also
features a polarity fault detection and correction cir-
cuit which will detect and correct a polarity error on
the twisted pair wire, the most common wiring fault
in twisted pair networks.
A 20 MHz parallel resonant crystal is used to control
the clock generation oscillator, which provides the
basic 20 MHz clock source. An internal divide-by-
two counter generates the 10 MHz
g
0.01% clock
required by the IEEE 802.3 specification.
The 82595FX supports 802.3 Half Duplex Ethernet
functionality, as did previous versions of the 82595.
It also supports a Full Duplex Ethernet mode that
complies with Specifications for Full Duplex Ether-
net, Rev. 1.0, Sept. 9th, 1993, from Kalpana, when
connected to a Full Duplex hub through the TPE
port.
Full-duplex
provides
throughput (using full duplex network components)
by providing dedicated channels for both Transmit
and Receive data at the same time. Full Duplex op-
eration is transparent to existing software drivers.
More details on Full Duplex functionality can be
found in the 82595FX User’s Guide.
increased
network
Auto-Negotiation (or N-Way) is a method of maximiz-
ing network operational efficiency. Auto-Negotiation
works by interrogating Auto-Negotiation compliant
equipment to determine the highest common mode
of operation shared by all connected devices. When
Auto-Negotiation is enabled, the 82595FX will nego-
tiate the Highest Common Denominator (HCD)
transmission mode with the hub to which it is at-
tached, on a hardware reset. If the hub does not
support Auto-Negotiation and Auto-Negotiation is
enabled on the 82595FX, the 82595FX will revert to
Half Duplex.
The 82595FX is in Auto-Negotiation mode only
when the A-N Enable bit, bit 1 in register 13 of bank
2, is set. On hardware reset, the state of this bit is
copied from the EEPROM A-N Enable bit, bit 9 of
Word 0 of the EEPROM.
We recommend that a crystal that meets the follow-
ing specifications be used:
#
Quartz Crystal
#
20.00 MHz
g
0.002% at 25
§
C
#
Accuracy
g
0.005% over Full Operating Temper-
ature, 0
§
C to
a
70
§
C
#
Parallel resonant with 20 pF Load Fundamental
Mode
Several vendors have such crystals; either off-the-
shelf or custom-made. Two possible vendors are:
1. M-Tron Industries, Inc.
Yankton, SD
57078
Specifications:
Part No. HC49 with 20 MHz, 50 PPM over 0
§
C to
a
70
§
C, and 20 pF fundamental load.
2. Crystek Corporation
100 Crystal Drive
Ft. Myers, FL
33907
Part No. 013212
The accuracy of the Crystal Oscillator frequency de-
pends on the PC board characteristics; therefore, it
is advisable to keep the X1 and X2 traces as short
as possible. The optimum value of C1 and C2 should
be determined experimentally under nominal operat-
ing conditions. The typical value of C1 and C2 is
between 22 pF and 35 pF.
An external 20 MHz MOS-level clock may be applied
to pin X1, if pin X2 is left floating.
A summary of the 82595FX’s serial interface sub-
sections functions is shown below:
#
Manchester Encoder/Decoder and Clock
Recovery
#
Diagnostic Loopback
#
Reset-Low-Power Mode
#
Network Status Indicators
#
Defeatable Jabber Timer
#
User Test Modes
32
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PDF描述 |
|---|---|
| 82595TX | ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER |
| 82596DX | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| 82595TX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER |
| 82596 | 制造商:TE Connectivity 功能描述:STD TERM/SPLICE WALL CHART - Bulk |
| 82596CA | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 82596DX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 82596SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
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