參數(shù)資料
型號(hào)： 82595FX
廠商： INTEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： ISA BUS HIGH INTEGRATION ETHERNET CONTROLLER
中文描述： 1 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16
封裝： QFP-160
文件頁(yè)數(shù)： 20/54頁(yè)
文件大小： 643K
代理商： 82595FX
82595FX
4.6 Boot EPROM/FLASH Interface
The Boot EPROM/FLASH of an 82595FX solution is
read from or written to (FLASH only) whenever the
host CPU performs a Read or a Write operation to a
memory location that is within the Boot EPROM/
FLASH mapping window. This window is program-
mable throughout the ISA PROM address range
(C8000–DFFFF) by configuring the 82595FX Boot
EPROM Decode Window register (Bank 1, Register
2, bits 4–6). The 82595FX asserts the BOOTCS
Y
signal when it decodes a valid access. Up to 1
MBytes of FLASH can be addressed by the
82595FX.
5.0
COMMAND AND STATUS
INTERFACE
The format for the 82595FX Command Register is
shown in Figure 5-1. The Command Register resides
in Register 0 of each of the three IO Banks of the
82595FX, and can be accessed in any of these
banks. The Command Register is accessed by writ-
ing to or reading from the IO address for Register 0.
5.1 Command OP Code Field
Bits 0 through 4 of the Command Register comprise
the Command OP Code field. A command is issued
to the 82595FX by writing it into the Command OP
Code field. A command can be issued to the
82595FX at any time; however in certain cases the
command may be ignored (for example, issuing a
Transmit command while a Transmit is already in
progress). In these cases the command is not per-
formed, and no interrupt will result from it.
The Command OP Code field can also be read. In
this case it will indicate an execution status event
other than TRANSMIT DONE (TDR Done, DIAG-
NOSE Done, MC-SETUP Done, DUMP Done, INIT
Done, and POWER-UP) has been completed. This
field is valid only when the EXEC INT bit (Bank 0,
Reg 1, Bit 3) is set.
5.2 ABORT (Bit 5)
This bit indicates if an execution command other
than TRANSMIT was aborted while in progress. This
bit provides status information only. It should be writ-
ten to a 0 whenever the Command Register is writ-
ten to.
5.3 Pointer Field (Bits 6 and 7)
The Pointer field controls which 82595FX IO register
bank is currently to be accessed (Bank 0, Bank 1, or
Bank 2). Writing a 00:b to the Pointer field selects
Bank 0, 01:b for Bank 1, and 10:b for Bank 2. The
Pointer field is valid only when the SWITCH BANK
(0h) command is issued. This field will be ignored for
any other command. The 82595FX will continue to
operate in a current bank until a different bank is
selected. Upon power up of the device or Reset, the
82595FX will default to Bank 0.
20
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
82595TX 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER
82596 制造商:TE Connectivity 功能描述:STD TERM/SPLICE WALL CHART - Bulk
82596CA 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
82596DX 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
82596SX 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
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