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參數(shù)資料
| 型號： | 82433LX |
| 廠商： | INTEL CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | LOCAL BUS ACCELERATOR (LBX) |
| 中文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 1/53頁 |
| 文件大?。?/td> | 540K |
| 代理商： | 82433LX |
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December 1995
Order Number: 290478-004
82433LX/82433NX
LOCAL BUS ACCELERATOR (LBX)
Y
Supports the Full 64-bit Pentium
é
Processor Data Bus at Frequencies up
to 66 MHz (82433LX and 82433NX)
Y
Drives 3.3V Signal Levels on the CPU
Data and Address Buses (82433NX)
Y
Provides a 64-Bit Interface to DRAM
and a 32-Bit Interface to PCI
Y
Five Integrated Write Posting and Read
Prefetch Buffers Increase CPU and PCI
Performance
D CPU-to-Memory Posted Write Buffer
4 Qwords Deep
D PCI-to-Memory Posted Write Buffer
Two Buffers, 4 Dwords Each
D PCI-to-Memory Read Prefetch Buffer
4 Qwords Deep
D CPU-to-PCI Posted Write Buffer
4 Dwords Deep
D CPU-to-PCI Read Prefetch Buffer
4 Dwords Deep
Y
CPU-to-Memory and CPU-to-PCI Write
Posting Buffers Accelerate Write
Performance
Y
Dual-Port Architecture Allows
Concurrent Operations on the Host and
PCI Buses
Y
Operates Synchronously to the CPU
and PCI Clocks
Y
Supports Burst Read and Writes of
Memory from the Host and PCI Buses
Y
Sequential CPU Writes to PCI
Converted to Zero Wait-State PCI
Bursts with Optional TRDY
Y
Connection
Y
Byte Parity Support for the Host and
Memory Buses
D Optional Parity Generation for Host
to Memory Transfers
D Optional Parity Checking for the
Secondary Cache
D Parity Checking for Host and PCI
Memory Reads
D Parity Generation for PCI to Memory
Writes
Y
160-Pin QFP Package
Two 82433LX or 82433NX Local Bus Accelerator (LBX) components provide a 64-bit data path between the
host CPU/Cache and main memory, a 32-bit data path between the host CPU bus and PCI Local Bus, and a
32-bit data path between the PCI Local Bus and main memory. The dual-port architecture allows concurrent
operations on the host and PCI Buses. The LBXs incorporate three write posting buffers and two read prefetch
buffers to increase CPU and PCI performance. The LBX supports byte parity for the host and main memory
buses. The 82433NX is intended to be used with the 82434NX PCI/Cache/Memory Controller (PCMC). The
82433LX is intended to be used with the 82434LX PCMC. During bus operations between the host, main
memory and PCI, the PCMC commands the LBXs to perform functions such as latching address and data,
merging data, and enabling output buffers. Together, these three components form a ‘‘Host Bridge’’ that
provides a full function dual-port data path interface, linking the host CPU and PCI bus to main memory.
This document describes both the 82433LX and 82433NX. Shaded areas, like this one, describe the
82433NX operations that differ from the 82433LX.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82433NX | LOCAL BUS ACCELERATOR (LBX) |
| 82434LX | PCI, CACHE AND MEMORY CONTROLLER PCMC |
| 82434NX | PCI, CACHE AND MEMORY CONTROLLER PCMC |
| 82437FX | System Controller(系統(tǒng)控制器) |
| 82438FX | Data Path Unit(數(shù)據(jù)路徑單元) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82433NX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:LOCAL BUS ACCELERATOR (LBX) |
| 82434LX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 82434NX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:PCI, CACHE AND MEMORY CONTROLLER PCMC |
| 824352 | 制造商: 功能描述: 制造商:Amphenol Corporation 功能描述: 制造商:undefined 功能描述: |
| 82-4352 | 功能描述:RF 連接器 N M39012/01-0005 RoHS:否 制造商:Bomar Interconnect 產(chǎn)品:Connectors 射頻系列:BNC 型式:Jack (Female) 極性: 觸點(diǎn)電鍍:Gold 阻抗: 端接類型:Solder 主體類型:Straight Bulkhead 電纜類型: |
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