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參數(shù)資料
| 型號： | 79RC32438 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDTTM InterpriseTM Integrated Communications Processor |
| 中文描述： | IDTTM InterpriseTM集成通信處理器 |
| 文件頁數(shù)： | 7/59頁 |
| 文件大?。?/td> | 644K |
| 代理商： | 79RC32438 |
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7 of 59
May 25, 2004
IDT 79RC32438
PCIREQN[3:0]
I/O
PCI Bus Request.
In PCI host mode with internal arbiter:
These signals are inputs whose assertion indicates to the internal RC32438
arbiter that an agent desires ownership of the PCI bus.
In PCI host mode with external arbiter:
PCIREQN[0]: asserted by the RC32438 to request ownership of the PCI bus.
PCIREQN[3:1]: unused and driven high.
In PCI satellite mode:
PCIREQN[0]: this signal is asserted by the RC32438 to request use of the PCI
bus.
PCIREQN[1]: function changes to PCIIDSEL and is used as a chip select during
configuration read and write transactions.
PCIREQN[3:2]: unused and driven high.
Note
: When the GPIO register is programmed in the alternate function mode for
bits GPIO [24] and [27], these bits become PCIREQN [4] and [5] respectively.
PCIRSTN
I/O
PCI Reset
. In host mode, this signal is asserted by the RC32438 to generate a
PCI reset. In satellite mode, assertion of this signal initiates a warm reset.
PCISERRN
I/O
PCI System Error
. This signal is driven by an agent to indicate an address par-
ity error, data parity error during a special cycle command, or any other system
error. Requires an external pull-up.
PCISTOPN
I/O
PCI Stop
. Driven by the bus target to terminate the current bus transaction. For
example, to indicate a retry.
PCITRDYN
I/O
PCI Target Ready
. Driven by the bus target to indicate that the current data can
complete.
General Purpose Input/Output
GPIO[0]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0SOUT
Alternate function: UART channel 0 serial output.
GPIO[1]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0SINP
Alternate function: UART channel 0 serial input.
GPIO[2]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0RIN
Alternate function: UART channel 0 ring indicator input.
GPIO[3]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DCDN
Alternate function: UART channel 0 data carrier detect input.
GPIO[4]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DTRN
Alternate function: UART channel 0 data terminal ready input.
GPIO[5]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: U0DSRN
Alternate function: UART channel 0 data set ready input.
Signal
Type
Name/Description
Table 1 Pin Description (Part 4 of 9)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32K438-200BB | IDTTM InterpriseTM Integrated Communications Processor |
| 79RC32K438-200BBI | IDTTM InterpriseTM Integrated Communications Processor |
| 79RC32K438-233BB | IDTTM InterpriseTM Integrated Communications Processor |
| 79RC32K438-233BBI | IDTTM InterpriseTM Integrated Communications Processor |
| 79RC32K438-266BB | IDTTM InterpriseTM Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32438-200BB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| 79RC32438-200BBI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| 79RC32438-233BB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| 79RC32438-233BBI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| 79RC32H434-266BC | 功能描述:處理器 - 專門應(yīng)用 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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