參數(shù)資料
型號(hào)： 79RC32438
廠(chǎng)商： Integrated Device Technology, Inc.
英文描述： IDTTM InterpriseTM Integrated Communications Processor
中文描述： IDTTM InterpriseTM集成通信處理器
文件頁(yè)數(shù)： 18/59頁(yè)
文件大?。?/td> 644K
代理商： 79RC32438
18 of 59
May 25, 2004
IDT 79RC32438
AC Timing Definitions
Below are examples of the AC timing characteristics used throughout this document.
Figure 2 AC Timing Definitions Waveform
Symbol
Definition
Tper
Clock period.
Tlow
Clock low. Amount of time the clock is low in one clock period.
Thigh
Clock high. Amount of time the clock is high in one clock period.
Trise
Rise time. Low to high transition time.
Tfall
Fall time. High to low transition time.
Tjitter
Jitter. Amount of time the reference clock (or signal) edge can vary on either the rising or falling edges.
Tdo
Data out. Amount of time after the reference clock edge that the output will become valid. The minimum time represents the data output hold.
The maximum time represents the earliest time the designer can use the data.
Tzd
Z state to data valid. Amount of time after the reference clock edge that the tri-stated output takes to become valid.
Tdz
Data valid to Z state. Amount of time after the reference clock edge that the valid output takes to become tri-stated.
Tsu
Input set-up. Amount of time before the reference clock edge that the input must be valid.
Thld
Input hold. Amount of time after the reference clock edge that the input must remain valid.
Tpw
Pulse width. Amount of time the input or output is active for asynchronous signals.
Tslew
Slew rate. The rise or fall rate for a signal to go from a high to low, or low to high.
X(clock)
Timing value. This notation represents a value of ‘X’ multiplied by the clock time period of the specified clock. Using 5(CLK) as an example:
X = 5 and the oscillator clock (CLK) = 25MHz, then the timing value is 200.
Tskew
Skew. The amount of time two signal edges deviate from one another.
Table 4 AC Timing Definitions
Tdz
Tzd
Tdo
Tpw
Thld
Tsu
Tlow
Thigh
Tper
clock
Output signal 1
Output signal 2
Input Signal 1
Signal 1
Tjitter
Trise
Tfall
Tdo
Signal 2
Signal 3
Tskew
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
79RC32438-200BB 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Microprocessor
79RC32438-200BBI 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Microprocessor
79RC32438-233BB 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Microprocessor
79RC32438-233BBI 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Microprocessor
79RC32H434-266BC 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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