參數(shù)資料
型號(hào)： 784215A
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁數(shù)： 79/100頁
文件大小： 564K
代理商： 784215A
Data Sheet U14121EJ2V0DS00
79
μ
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY
www.DataSheet4U.com
(d) I
2
C bus mode
Standard Mode
High-Speed Mode
Parameter
Symbol
MIN.
MAX.
MIN.
MAX.
Unit
SCL0 clock frequency
f
CLK
0
100
0
400
kHz
Bus free time (between stop
and start conditions)
t
BUF
4.7
1.3
μ
s
Hold time
Note1
t
HD : STA
4.0
0.6
μ
s
Low-level width of SCL0 clock
t
LOW
4.7
1.3
μ
s
High-level width of SCL0 clock
t
HIGH
4.0
0.6
μ
s
Setup time of start/restart
conditions
t
SU : STA
4.7
0.6
μ
s
When using CBUS-
compatible master
5.0
μ
s
Data hold
time
When using I
2
C bus
t
HD : DAT
0
Note 2
0
Note 2
0.9
Note 3
μ
s
Data setup time
t
SU : DAT
250
100
Note 4
ns
Rise time of SDA0 and SCL0
signals
t
R
1,000
20 + 0.1Cb
Note 5
300
ns
Fall time of SDA0 and SCL0
signals
t
F
300
20 + 0.1Cb
Note 5
300
ns
Setup time of stop condition
t
SU : STO
4.0
0.6
μ
s
Pulse width of spike restricted
by input filter
t
SP
0
50
ns
Load capacitance of each bus
line
Cb
400
400
pF
Notes 1.
For the start condition, the first clock pulse is generated after the hold time.
2.
To fill the undefined area of the SCL0 falling edge, it is necessary for the device to provide an internal
SDA0 signal (on V
IHmin.
) with at least 300 ns of hold time.
3.
If the device does not extend the SCL0 signal low-level hold time (t
LOW
), only the maximum data hold
time
t
HD : DAT
needs to be satisfied.
4.
The high-speed mode I
2
C bus can be used in a standard mode I
2
C bus system. In this case, the
conditions described below must be satisfied.
If the device does not extend the SCL0 signal low-level hold time
t
SU : DAT
≥
250 ns
If the device extends the SCL0 signal low-level hold time
Be sure to transmit the data bit to the SDA0 line before the SCL0 line is released (t
Rmax.
+ t
SU :
DAT
= 1,000 + 250 = 1,250 ns by standard mode I
2
C bus specification)
5.
Cb: Total capacitance per bus line (unit: pF)
相關(guān)PDF資料
PDF描述
784215AY MOS INTEGRATED CIRCUIT
784216A MOS INTEGRATED CIRCUIT
784216AY MOS INTEGRATED CIRCUIT
784217A MOS INTEGRATED CIRCUIT
784217AY MOS INTEGRATED CIRCUIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
784215AY 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT
784216A 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT
784216AY 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT
784217A 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT
784217AY 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*