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| 型號(hào)： | 7536 |
| 英文描述： | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7536組數(shù)據(jù)表數(shù)據(jù)表660K/SEP.05.00 |
| 文件頁(yè)數(shù)： | 26/46頁(yè) |
| 文件大?。?/td> | 660K |
| 代理商： | 7536 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7536 Group
MITSUBISHI MICROCOMPUTERS
25
Fig. 28 Structure of serial I/O1-related registers (5)
UART control register
(UARTCON: address 001B
16
)
Character length selection bit
0: 8 bits
1: 7 bits
Parity enable bit
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit
0: Even parity
1: Odd parity
Stop bit length selection bit
0: 1 stop bit
1: 2 stop bits
P-channel output disable bit
0: CMOS output
1: N-channel open-drain output
Not used (returns “1” when read)
CPU read: Disabled
CPU write: Set/Clear
Hardware read: Used
Hardware write: Not used
b7 b0
b7 b0
Serial I/O1 control register
(SIO1CON: address 001A
16
)
BRG count source selection bit
0: f(X
IN
)
1: f(X
IN
)/4
Not used (returns “1” when read)
Continuous transmit valid bit
0: Continuous transmit invalid
1: Continuous transmit valid
Transmit interrupt source selection bit
0: Interrupt when transmit buffer has
emptied
1: Interrupt when transmit shift
operation is completed
Transmit enable bit
0: Transmit disabled
1: Transmit enabled
Receive enable bit
0: Receive disabled
1: Receive enabled
Serial I/O1 mode selection bits
00: I/O port
01: Not available
10: UART mode
11: USB mode
CPU read: Disabled
CPU write: Set/Clear
Hardware read: Used
Hardware write: Not used
CPU read: Disabled
CPU write: Set/Clear
Hardware read: Used
Hardware write: Not used
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 754080 | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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| 852X12 | SCHRAUBE LINSE SCHLITZ M2 12MM Inhalt pro Packung: 100 Stk. |
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