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| 型號(hào)： | 7536 |
| 英文描述： | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7536組數(shù)據(jù)表數(shù)據(jù)表660K/SEP.05.00 |
| 文件頁(yè)數(shù)： | 10/46頁(yè) |
| 文件大小： | 660K |
| 代理商： | 7536 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7536 Group
MITSUBISHI MICROCOMPUTERS
9
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/out-
put direction of each pin. Each bit in a direction register corresponds
to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes an
output port. When “0” is set to the bit, the pin becomes an input port.
When data is read from a pin set to output, not the value of the pin
itself but the value of port latch is read. Pins set to input are floating,
and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and the
pin remains floating.
[Pull-up control] PULL
By setting the pull-up control register (address 0016
16
), ports P0 and
P3 can exert pull-up control by program. However, pins set to output
are disconnected from this control and cannot exert pull-up control.
[Port P1P3 control] P1P3C
By setting the port P1P3 control register (address 0017
16
), a CMOS
input level or a TTL input level can be selected for ports P1
0
, P1
2,
P1
3,
P3
5,
P3
6
and P3
7
by program.
Fig. 10 Structure of port P1P3 control register
Fig. 9 Structure of pull-up control register
Pull-up control register
(PULL: address 0016
16
)
P0
0
pull-up control bit
P0
1
pull-up control bit
P0
2
, P0
3
pull-up control bit
P0
4
– P0
7
pull-up control bit
P3
0
– P3
3
pull-up control bit
P3
4
pull-up control bit
P3
5
, P3
6
pull-up control bit
P3
7
pull-up control bit
Note :
Pins set to output ports are disconnected from pull-up control.
b7 b0
0: Pull-up off
1: Pull-up on
Initial value: FF
16
Port P1P3 control register
(P1P3C: address 0017
16
)
b7 b0
P3
7
/INT
0
input level selection bit
0 : CMOS level
1 : TTL level
P3
6
/INT
1
input level selection bit
0 : CMOS level
1 : TTL level
P1
0
,P1
2
,P1
3
input level selection bit
0 : CMOS level
1 : TTL level
Not used
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| 754080 | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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