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| 型號： | 7536 |
| 英文描述： | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7536組數(shù)據(jù)表數(shù)據(jù)表660K/SEP.05.00 |
| 文件頁數(shù)： | 16/46頁 |
| 文件大?。?/td> | 660K |
| 代理商： | 7536 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7536 Group
MITSUBISHI MICROCOMPUTERS
15
Key Input Interrupt (Key-On Wake-Up)
A key-on wake-up interrupt request is generated by applying “L” level
to any pin of port P0 that has been set to input mode.
In other words, it is generated when the AND of input level goes from
“1” to “0”. An example of using a key input interrupt is shown in Fig-
ure 15, where an interrupt request is generated by pressing one of
the keys provided as an active-low key matrix which uses ports P0
0
to P0
3
as input ports.
Fig. 15 Connection example when using key input interrupt and port P0 block diagram
Port PXx
“L” level output
PULL register
bit 3 = “0”
Port P0
7
latch
Port P0
7
Direction register = “1”
**
*
P0
7
output
Key input interrupt request
Port P0
Input read circuit
* P-channel transistor for pull-up
** CMOS output buffer
PULL register
bit 3 = “0”
Port P0
6
latch
Port P0
6
Direction register = “1”
**
*
P0
6
output
PULL register
bit 3 = “0”
Port P0
5
latch
Port P0
5
Direction register = “1”
**
*
P0
5
output
PULL register
bit 3 = “0”
Port P0
4
latch
Port P0
4
Direction register = “1”
**
*
PULL register
bit 2 = “1”
Port P0
3
latch
Port P0
3
Direction register = “0”
**
*
P0
3
input
PULL register
bit 2 = “1”
Port P0
2
latch
Port P0
2
Direction register = “0”
**
*
P0
2
input
PULL register
bit 1 = “1”
Port P0
1
latch
Port P0
1
Direction register = “0”
**
*
P0
1
input
PULL register
bit 0 = “1”
Port P0
0
latch
Port P0
0
Direction register = “0”
**
*
P0
0
input
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
P0
4
output
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 754080 | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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