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| 型號(hào)： | 7531GROUP |
| 英文描述： | 250MA CMOS LDO, ISUPPLY 1UA & 2% VOUT ACCURACY, -40C to +125C, 3-SOT-89, T/R |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 22/64頁 |
| 文件大?。?/td> | 633K |
| 代理商： | 7531GROUP |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7531 Group
MITSUBISHI MICROCOMPUTERS
22
Fig. 25 Continuous transmission operation of UART serial I/O
[Serial I/O1 control register] SIO1CON
The serial I/O1 control register consists of eight control bits for the
serial I/O1 function.
[UART control register] UARTCON
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set the
data format of an data transfer. One bit in this register (bit 4) is al-
ways valid and sets the output structure of the P1
1
/TxD pin.
[Serial I/O1 status register] SIO1STS
The read-only serial I/O1 status register consists of seven flags (bits
0 to 6) which indicate the operating status of the serial I/O function
and various errors.
The receive buffer full flag (bit 1) is cleared to “0” when the receive
buffer is read.
If there is an error, it is detected at the same time that data is trans-
ferred from the receive shift register to the receive buffer, and the
receive buffer full flag is set. A write to the serial I/O1 status register
clears all the error flags OE, PE, FE, and SE (bit 3 to bit 6, respec-
tively). Writing “11” to bits 7 and 6 of the serial I/O1 control register
initializes this register.
All bits of the serial I/O1 status register are initialized to “81
16
” at
reset.
[Transmit/Receive buffer register] TB/RB
The transmit buffer and the receive buffer are located at the same
address. The transmit buffer is write-only and the receive buffer is
read-only. If a character bit length is 7-bit, the MSB of data stored in
the receive buffer is "0".
[Baud Rate Generator] BRG
The baud rate generator determines the baud rate for serial transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate generator.
TSC=0
TBE=1
TBE=0
ST
D
0
D
1
SP
D
0
D
1
ST
SP
ST
1 :
When the serial I/O1 enable bit (b7) is “1”, the transmit enable bit is “1”, and continuous transmit valid bit is “1”, writing on the
transmit buffer initiates continuous transmission of the same data.
2 :
Select 0 for continuous transmit valid bit to stop continuous transmission.
The T
X
D pin will stop at high level after completing transmission of 1 byte.
3 :
If the transmit buffer contents are rewritten during a continuous transmission, transmission of the rewritten data will be started after
completing transmission of 1 byte.
Notes
1 Start Bit
7 or 8 Data Bit
1 or 0 Parity Bit
1 or 2 Stop Bit
Transmit/Receive Clock
Transmit Buffer Register
Write Signal
Serial Output T
X
D
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PDF描述 |
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| 7531 | 250mA CMOS LDO, Isupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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| 7533 | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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| 7535 | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
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