參數(shù)資料
型號： 7510
英文描述： 7510 Group Datasheet Datasheet 469K/JAN.10.98
中文描述： 7510組數(shù)據(jù)表數(shù)據(jù)表469K/JAN.10.98
文件頁數(shù)： 26/44頁
文件大小： 469K
代理商： 7510
25
7510 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Bias Control and Time Division Control
The LCD controller/driver has built-in bias resistor and supports 1/
4 bias or 1/5 bias. The bias setting is made by either floating pins
V
L2
and V
L3
(1/5 bias) or shorting them together externally (1/4
bias). The number of common pins driven is determined by the
duty ratio selected. Bits 0 and 1 of the LCD mode register are
used to set the duty ratio.
Contrast Controller
The contrast controller is a circuit generating 32 steps of voltages
using the voltage applied to the V
LCD
pin as the reference voltage.
The voltage generated varies depending on the values given to bit
0–bit 4 with the LCD contrast control register. When bit 7 of the
LCD contrast control register is set to “1”, the voltage generated by
the contrast controller is applied to V
L5
. Given below is the relation
between the values set to bit 0–bit 4 of LCD contrast control regis-
ter and the voltages applied to V
L5
.
Voltage applied to V
L5
= Voltage applied to the V
LCD
pin
(n+33)/64
Where:
n = Value set to bit 0–bit 4 of the LCD contrast control register (in
decimal values)
Duty
ratio
1/8
1/11
1/16
Duty ratio selection bit
Bit 1
0
0
1
1
Note:
For all duty ratios, the unused common pins output the non-select
waveform.
Bit 0
0
1
0
1
Common pins used
COM
0
–COM
7
COM
8
–COM
15
COM
0
–COM
10
COM
0
–COM
15
When the contrast controller is used, it becomes possible to apply
32 steps of voltage to V
L5
from 1/2 V
LCD
through V
LCD
. Conse-
quently, 32 steps of contrast adjustment by the software becomes
possible.
Note:
Supply power to the contrast controller from an external source
through the V
LCD
pin.
Also, when bit 7 of the LCD contrast control register is set to “0”,
V
LCD
pin is coupled directly to V
L5
(the contrast controller and V
L5
become separated). In this case, perform contrast adjustment using
an external circuit.
Fig. 22 Structure of LCD contrast control register
LCD Drive Timing
The LCD controller/driver supports both type-A and type-B drive
timing.
The desired type is selected by setting the LCD drive timing selec-
tion bit (bit 4 of the LCD mode register).
If the LCD drive timing selection bit is set to “0”, type-A is selected,
and if this bit is set to “1”, type-B is selected. After reset, type-A is
selected for the drive timing.
The frame frequency can be determined by the following equation:
Frame frequency =
Fig. 21 Example of circuit at 1/5 and 1/4 bias
Table 3 Time division control
LCDCK count source frequency
LCDCK division ratio
duty ratio
V
L5
R
V
L4
R
V
L3
R
V
L2
R
V
L1
R
V
L2
V
L3
Contrast
controller
“0”
“1”
LCD contrast control enable bit
Variable
resistance
for
brightness
control
Open
V
LCD
1/5 bias
Variable resistance
for
brightness control
V
L5
R
V
L4
R
V
L3
R
V
L2
R
V
L1
R
V
L2
V
L3
Contrast
controller
“0”
“1”
LCD contrast control enable bit
External
connection
V
LCD
1/4 bias
LCD contrast control register
(LC : address 0037
16
)
V
LCD
level selection bit
Not used (returns “0” when read)
LCD contrast control enable bit
0 : Built-in LCD contrast
controller is not used
1 : Built-in LCD contrast
controller is used.
b7
b0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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