參數(shù)資料
型號: 74LVC1G125
廠商: Texas Instruments, Inc.
英文描述: 8-Bit Addressable Latches 16-SO -40 to 85
中文描述: 單總線緩沖器門具有三態(tài)輸出
文件頁數(shù): 4/17頁
文件大?。?/td> 91K
代理商: 74LVC1G125
9397 750 13762
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 18 October 2004
4 of 17
Philips Semiconductors
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
7.
Functional description
7.1 Function table
[1]
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
= LOW-to-HIGH CP transition;
X = don’t care.
8.
Limiting values
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
9.
Recommended operating conditions
Table 4:
Operating mode
Function table
[1]
Input
MR
L
H
H
Output
Q
L
H
L
CP
X
D
X
h
l
Reset (clear)
Load ‘1’
Load ‘0’
Table 5:
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Conditions
V
CC
supply voltage
I
IK
input diode current
V
I
< 0 V
V
I
input voltage
I
OK
output diode current
V
O
> V
CC
or V
O
< 0 V
V
O
output voltage
active mode
Power-down mode
I
O
output diode current
V
O
= 0 V to V
CC
I
CC
, I
GND
V
CC
or GND current
T
stg
storage temperature
P
tot
power dissipation
T
amb
=
40
°
C to +125
°
C
Limiting values
Min
0.5
-
Max
+6.5
50
+6.5
±
50
V
CC
+ 0.5 V
+6.5
±
50
±
100
+150
250
Unit
V
mA
V
mA
[1]
0.5
-
[1] [2]
0.5
[1] [2]
0.5
V
mA
mA
°
C
mW
-
-
65
-
Table 6:
Symbol
V
CC
V
I
V
O
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
Conditions
Min
1.65
0
0
0
Max
5.5
5.5
V
CC
5.5
Unit
V
V
V
V
active mode
Power-down mode; V
CC
= 0 V
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