參數(shù)資料
型號: 73M1866B-IM/F
廠商: Maxim Integrated Products
文件頁數(shù): 47/88頁
文件大?。?/td> 0K
描述: MICRODAA SGL PCM HIGHWAY 42-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 260
系列: MicroDAA™
功能: 數(shù)據(jù)存取裝置(DAA)
接口: PCM,串行,SPI
電路數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 42-VFQFN 裸露焊盤
供應商設備封裝: 42-QFN(8x8)
包裝: 管件
包括: PCM 通路
DS_1x66B_001
73M1866B/73M1966B Data Sheet
Rev. 1.6
51
8.7.2
Total Receive Path Response
Figure 29: Overall Frequency Response of the Receive Path
Figure 30: Pass-band Response of the Overall Receive Path
8.7.3
Receiver DC Offset Subtraction
The 73M1x66B provides a method to improve audio quality by reducing unwanted DC offset from the
receiver signal path in A-
law or μ-law compression modes. This method requires that a signal path
calibration be performed. This calibration is benign to the performance of the device and is only required
after an initialization or device reset sequence. Receiver DC offset calibration can only be executed when
the device is on-hook and not in linear mode, otherwise the process will disturb signal quality. See the
73M1866B/73M1966B Implementer’s Guide for the steps to enable the calibration of receive DC offset.
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