- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299201 > 72205LB25TFI (INTEGRATED DEVICE TECHNOLOGY INC) 256 X 18 OTHER FIFO, 15 ns, PQFP64 PDF資料下載
參數(shù)資料
| 型號： | 72205LB25TFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | FIFO |
| 英文描述： | 256 X 18 OTHER FIFO, 15 ns, PQFP64 |
| 封裝： | PLASTIC, STQFP-64 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 181K |
| 代理商： | 72205LB25TFI |
10
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Commercial And Industrial Temperature Ranges
Figure 7. First Data Word Latency after Reset with Simultaneous Read and Write
Figure 8. Full Flag Timing
WCLK
D0 - D17
RCLK
Q0 - Q17
t DS
tSKEW2
t ENS
t REF
tA
0
12
3
D
DDD
01
DD
(first valid write)
t OE
t OLZ
tA
tFRL(1)
D4
tENS
2766 drw 09
NOTE:
1. tSKEW1 is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that
FF will go HIGH during the current clock cycle. If the
time between the rising edge of RCLK and the rising edge of WCLK is less than tSKEW1, then
FF may not change state until the next WCLK edge.
DATA READ
WCLK
D0 - D17
RCLK
Q0 - Q17
t A
t WFF
DATA WRITE
t WFF
t ENH
t ENS
t DS
t WFF
t DS
DATA
WRITE
NEXT DATA READ
t A
NO WRITE
DATA IN OUTPUT REGISTER
LOW
tSKEW1
(1)
t SKEW1
(1)
t ENH
t ENS
2766 drw 10
NOTES:
1. When tSKEW2 minimum specification, tFRL (maximum) = tCLK + tSKEW2. When tSKEW2 < minimum specification, tFRL (maximum) = either
2*tCLK + tSKEW2 or tCLK + tSKEW2. The Latency Timing applies only at the Empty Boundary (
EF = LOW).
2. The first word is available the cycle after
EF goes HIGH, always.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 72215LB10TFG8 | 512 X 18 OTHER FIFO, 6.5 ns, PQFP64 |
| 72215LB15J8 | 512 X 18 OTHER FIFO, 10 ns, PQCC68 |
| IDT72235LB25TF | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72235LB25TFI | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72235LB25TFB | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 72205LB25TFI8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 256 x 18 64-Pin STQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 256 X 18 64TQFP - Tape and Reel |
| 72206 | 功能描述:柵欄接線端子 PCB BARRIER TERMINAL RoHS:否 制造商:TE Connectivity / AMP 產(chǎn)品:Barrier Terminal Blocks 系列: 類型:Dual Barrier, Flat Block without Mounting Ears 節(jié)距:9.53 mm 位置/觸點數(shù)量:2 線規(guī)量程:22-12 電流額定值:20 A 電壓額定值:300 V 安裝風格:Through Hole 安裝角:Vertical 端接類型:Screw 觸點電鍍:Tin |
| 72206 BUCKSKIN 1/4"X150' | 功能描述:SCOTCHCAL STRIPING TAPE 制造商:3m 系列:* 零件狀態(tài):在售 標準包裝:1 |
| 72-2060 | 制造商:MCM Electronics / Tenma 功能描述:THERMOMETER SINGLE INPUT 制造商:TENMA 功能描述:THERMOMETER, SINGLE INPUT |
| 72-2060 CAL | 制造商:PRIVATE LABEL 功能描述:CALIBRATED - Test, Temperature, Temperature Tester Type:Thermocouple (K), Extern |
發(fā)布緊急采購，3分鐘左右您將得到回復。