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參數資料
| 型號： | 72215LB10TFG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | FIFO |
| 英文描述： | 512 X 18 OTHER FIFO, 6.5 ns, PQFP64 |
| 封裝： | PLASTIC, STQFP-64 |
| 文件頁數： | 1/16頁 |
| 文件大?。?/td> | 181K |
| 代理商： | 72215LB10TFG8 |
1
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18-BIT, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Commercial And Industrial Temperature Ranges
FEATURES:
256 x 18-bit organization array (IDT72205LB)
512 x 18-bit organization array (IDT72215LB)
1,024 x 18-bit organization array (IDT72225LB)
2,048 x 18-bit organization array (IDT72235LB)
4,096 x 18-bit organization array (IDT72245LB)
10 ns read/write cycle time
Empty and Full flags signal FIFO status
Easily expandable in depth and width
Asynchronous or coincident read and write clocks
Programmable Almost-Empty and Almost-Full flags with
default settings
Half-Full flag capability
Dual-Port zero fall-through time architecture
Output enable puts output data bus in high-impedance
state
High-performance submicron CMOS technology
Available in a 64-lead thin quad flatpack (TQFP/STQFP)
and plastic leaded chip carrier (PLCC)
Industrial temperature range (–40°C to +85°C) is available
Integrated Device Technology, Inc.
IDT72205LB
IDT72215LB
IDT72225LB
IDT72235LB
IDT72245LB
CMOS SyncFIFO
256 x 18, 512 x 18, 1,024 x 18,
2,048 x 18 and 4,096 x 18
SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
MAY 2000
2000 Integrated Device Technology, Inc.
DSC-2766/-
are applicable for a wide variety of data buffering needs, such
as optical disk controllers, Local Area Networks (LANs), and
interprocessor communication.
These FIFOs have 18-bit input and output ports. The input
port is controlled by a free-running clock (WCLK), and an input
enable pin (
WEN). Data is read into the synchronous FIFO on
every clock when
WEN is asserted. The output port is controlled
by another clock pin (RCLK) and another enable pin (
REN). The
read clock can be tied to the write clock for single clock
operation or the two clocks can run asynchronous of one
another for dual-clock operation. An Output Enable pin (
OE) is
provided on the read port for three-state control of the output.
The synchronous FIFOs have two fixed flags, Empty (
EF) and
Full (
FF), and two programmable flags, Almost-Empty (PAE)
and Almost-Full (
PAF). The offset loading of the programmable
flags is controlled by a simple state machine, and is initiated by
asserting the Load pin (
LD). A Half-Full flag (HF) is available
when the FIFO is used in a single device configuration.
These devices are depth expandable using a Daisy-Chain
technique. The XI and
XO pins are used to expand the FIFOs.
In depth expansion configuration,
FL is grounded on the first
device and set to HIGH for all other devices in the Daisy Chain.
The IDT72205LB/72215LB/72225LB/72235LB/72245LB is
fabricated using IDT’s high-speed submicron CMOS technol-
ogy.
1
FUNCTIONAL BLOCK DIAGRAM
INPUT REGISTER
OUTPUT REGISTER
RAM ARRAY
256 x 18, 512 x 18
1,024 x 18, 2,048 x 18
4,096 x 18
OFFSET REGISTER
FLAG
LOGIC
/(
)
READ POINTER
READ CONTROL
LOGIC
WRITE CONTROL
LOGIC
WRITE POINTER
EXPANSION LOGIC
RESET LOGIC
WCLK
D0-D17
(
)/
RCLK
Q0-Q17
2766 drw 01
DESCRIPTION:
The IDT72205LB/72215LB/72225LB/72235LB/72245LB
are very high-speed, low-power First-In, First-Out (FIFO)
memories with clocked read and write controls. These FIFOs
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
相關PDF資料 |
PDF描述 |
|---|---|
| 72215LB15J8 | 512 X 18 OTHER FIFO, 10 ns, PQCC68 |
| IDT72235LB25TF | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72235LB25TFI | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72235LB25TFB | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72241L25LB | 4K X 9 OTHER FIFO, 15 ns, CQCC32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 72215LB15J | 功能描述:先進先出 RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| 72215LB15J8 | 功能描述:先進先出 RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| 72215LB15JI | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 512 x 18 68-Pin PLCC 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 512X18 68PLCC - Rail/Tube |
| 72215LB15JI8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 512 x 18 68-Pin PLCC T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 512X18 68PLCC - Tape and Reel |
| 72215LB15PF | 功能描述:先進先出 RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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