參數(shù)資料
型號(hào)： 72215LB10TFG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： FIFO
英文描述： 512 X 18 OTHER FIFO, 6.5 ns, PQFP64
封裝： PLASTIC, STQFP-64
文件頁(yè)數(shù)： 7/16頁(yè)
文件大?。?/td> 181K
代理商： 72215LB10TFG8
15
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18-BIT, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Commercial And Industrial Temperature Ranges
DEPTH EXPANSION CONFIGURATION
(WITH PROGRAMMABLE FLAGS)
These devices can easily be adapted to applications requir-
ing more than 256/512/1,024/2,048/4,096 words of buffering.
Figure 21 shows Depth Expansion using three IDT72205LB/
72215LB/72225LB/72235LB/72245LBs. Maximum depth is
limited only by signal loading. Follow these steps:
1. The first device must be designated by grounding the
First Load (
FL) control input.
2. All other devices must have
FL in the HIGH state.
3. The Write Expansion Out (
WXO) pin of each device
must be tied to the Write Expansion In (
WXI) pin of
the next device. See Figure 21.
4. The Read Expansion Out (
RXO) pin of each device
must be tied to the Read Expansion In (
RXI) pin of
the next device. See Figure 21.
5. All Load (
LD) pins are tied together.
6. The Half-Full Flag (
HF) is not available in this Depth
Expansion Configuration.
7.
EF, FF, PAE, and PAF are created with composite
flags by ORing together every respective flags for
monitoring. The composite
PAE and PAF flags are not
precise.
Figure 21. Block Diagram of 768 x 18, 1,536 x 18, 3,072 x 18, 6,144 x 18, 12,288 x 18 Synchronous
FIFO Memory With Programmable Flags used in Depth Expansion Configuration
LOAD
WRITE CLOCK
WRITE ENABLE
READ CLOCK
READ ENABLE
OUTPUT ENABLE
DATA IN
DATA OUT
RESET
IDT
72205LB
72215LB
72225LB
72235LB
72245LB
FIRST LOAD (
)
Vcc
IDT
72205LB
72215LB
72225LB
72235LB
72245LB
IDT
72205LB
72215LB
72225LB
72235LB
72245LB
2766 drw 23
RCLK
WCLK
RCLK
WCLK
RCLK
WCLK
Dn
Qn
Dn
Qn
Dn
Qn
相關(guān)PDF資料
PDF描述
72215LB15J8 512 X 18 OTHER FIFO, 10 ns, PQCC68
IDT72235LB25TF CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18
IDT72235LB25TFI CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18
IDT72235LB25TFB CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18
IDT72241L25LB 4K X 9 OTHER FIFO, 15 ns, CQCC32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
72215LB15J 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72215LB15J8 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72215LB15JI 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 512 x 18 68-Pin PLCC 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 512X18 68PLCC - Rail/Tube
72215LB15JI8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 512 x 18 68-Pin PLCC T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 512X18 68PLCC - Tape and Reel
72215LB15PF 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
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