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參數(shù)資料
| 型號(hào)： | 72205LB15PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | FIFO |
| 英文描述： | 256 X 18 OTHER FIFO, 10 ns, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 181K |
| 代理商： | 72205LB15PFI |
9
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO
256 x 18-BIT, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Commercial And Industrial Temperature Ranges
Figure 6. Read Cycle Timing
NOTES:
1. tSKEW1 is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that
FF will go HIGH during the current clock cycle. If the
time between the rising edge of RCLK and the rising edge of WCLK is less than tSKEW1, then
FF may not change state until the next WCLK edge.
WCLK
D0 - D17
t CLK
t CLKH
t CLKL
t DS
tENS
t DH
tENH
tWFF
t WFF
DATA IN VALID
NO OPERATION
RCLK
SKEW1
t
(1)
2766 drw 07
Figure 5. Write Cycle Timing
NOTE:
1. tSKEW2 is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that
EF will go HIGH during the current clock cycle. If the
time between the rising edge of WCLK and the rising edge of RCLK is less than tSKEW2, then
EF may not change state until the next RCLK edge.
NO OPERATION
RCLK
t CLK
t CLKH
t CLKL
t ENS
tENH
tREF
t REF
VALID DATA
tA
t OLZ
t OE
t OHZ
Q0 - Q17
WCLK
SKEW2
t
(1)
2766 drw 08
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 72205LB25TFI | 256 X 18 OTHER FIFO, 15 ns, PQFP64 |
| 72215LB10TFG8 | 512 X 18 OTHER FIFO, 6.5 ns, PQFP64 |
| 72215LB15J8 | 512 X 18 OTHER FIFO, 10 ns, PQCC68 |
| IDT72235LB25TF | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
| IDT72235LB25TFI | CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 72205LB15PFI8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 256 x 18 64-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 256 X 18 64TQFP - Tape and Reel |
| 72205LB15TF | 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| 72205LB15TF8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 256 x 18 64-Pin STQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 256 X 18 64TQFP - Tape and Reel |
| 72205LB15TFI | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 256 x 18 64-Pin STQFP 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 256 X 18 64TQFP - Rail/Tube |
| 72205LB15TFI8 | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 256 x 18 64-Pin STQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 256 X 18 64TQFP - Tape and Reel |
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