參數(shù)資料
型號(hào): 71M6543F-IGT/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封裝: LEAD FREE, LQFP-100
文件頁(yè)數(shù): 134/157頁(yè)
文件大小: 2178K
代理商: 71M6543F-IGT/F
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)當(dāng)前第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)
71M6543F/H and 71M6543G/GH Data Sheet
78
2008–2011 Teridian Semiconductor Corporation
v1.2
3.2.1
BRN Mode
In BRN mode, most non-metering digital functions are active (as shown in Table 62) including ICE, UART,
EEPROM, LCD and RTC. In BRN mode, the PLL continues to function at the same frequency as MSN
mode. It is up to the MPU to scale down the PLL (using PLL_FAST, I/O RAM 0x2200[4]) or the MPU
frequency (using MPU_DIV[2:0], I/O RAM 0x2200[2:0]) in order to save power.
From BRN mode, the MPU can choose to enter LCD or SLP modes. When system power is restored
while the 71M6543 is in BRN mode, the part automatically transitions to MSN mode.
The recommended minimum power configuration for BRN mode is as follows:
RCE0 = 0x00 (I/O RAM 0x2709[7:0]) - remote sensors disabled
LCD_BAT = 1 (I/O RAM 0x2402[7]) - LCD powered from VBAT
LCD_VMODE[1:0] = 0 (I/O RAM 0x2401[7:6]) - 5V LCD boost disabled
CE6 = 0x00 (I/O RAM 0x2106) - CE, RTM and CHOP are disabled
MUX_DIV[3:0] = 0(I/O RAM 0x2100[7:4]) - the ADC multiplexer is disabled
ADC_E = 0 (I/O RAM 0x2704[4]) - ADC disabled
VREF_CAL = 0 (I/O RAM 0x2704[7]) – Vref not driven out
VREF_DIS = 1 (I/O RAM 0x2704[6]) - Vref disabled
PRE_E = 0 (I/O RAM 0x2704[5] - pre-amp disabled
BCURR = 0 (I/O RAM 0x2704[3]) - battery 100A current load OFF
TMUX[5:0] = 0x0E (I/O RAM 0x2502[5:0]) – TMUXOUT output set to a dc value
TMUX2[4:0] = 0x0E (I/O RAM 0x2503[4:0]) – TMUXOUT2 output set to a dc value
CKGN = 0x24 (I/O RAM 0x2200) - PLL set slow, and MPU_DIV[2:0] (I/O RAM 0x2200[2:0]) set to maximum
TEMP_PER[2:0] = 6 (I/O RAM 0x28A0[2:0]) - temp measurement set to automatic every 512 s
TEMP_BSEL = 1 (I/O RAM 0x28A0[7]) - temperature sensor monitors VBAT
PCON |= 1 (SFR 0x87) - at the end of the main BRN loop, halt the MPU and wait for an interrupt
The baud rate registers are adjusted as needed
All unused interrupts are disabled
3.2.2
LCD Mode
LCD mode may be commanded by the MPU at any time by setting the LCD_ONLY control bit (I/O RAM
0x28B2[6]). However, it is recommended that the LCD_ONLY control bit be set by the MPU only after the
71M6543 has entered BRN mode. For example, if the 71M6543 is in MSN mode when LCD_ONLY is set,
the duration of LCD mode is very brief and the 71M6543 immediately 'wakes'.
In LCD mode, V3P3D is disabled, and the VBAT pin supplies the LCD current. Before asserting
LCD_ONLY mode, it is recommended that the MPU minimize PLL current by reducing the output
frequency of the PLL to 6.29 MHz (i.e., write PLL_FAST = 0, I/O RAM 0x2200[4]). The LCD boost system
requires a clock from the PLL for its operation. Thus, if the LCD boost system is enabled (i.e.,
LCD_VMODE[1:0] = 10, I/O RAM 0x2401[7:6]), then the PLL is automatically kept active during LCD
mode, otherwise the PLL is de-activated.
In LCD mode, the data contained in the LCD_SEG registers is displayed using the segment driver pins.
Up to two LCD segments connected to the pins SEGDIO22 and SEGDIO23 can be made to blink without
the involvement of the MPU, which is disabled in LCD mode. To minimize battery power consumption,
only segments that are used should be enabled.
After the transition from LCD mode to MSN or BRN mode, the PC (Program Counter) is at 0x0000, the
XRAM is in an undefined state, and configuration I/O RAM bits are reset (see Table 71 for I/O RAM state
upon wake). The data stored in non-volatile I/O RAM locations is preserved in LCD mode (the shaded
locations in Table 71 are non-volatile).
相關(guān)PDF資料
PDF描述
71M6543H-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543F-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
71M6543F-IGTR/F 功能描述:計(jì)量片上系統(tǒng) - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6543FT-IGT/F 制造商:Maxim Integrated Products 功能描述:ENERGY METER ICS - Rail/Tube
71M6543FT-IGTR/F 制造商:Maxim Integrated Products 功能描述:3-PHASE SOC, 64KB FLASH, PRES TEMP SENSOR - Tape and Reel
71M6543G 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation
71M6543GH 制造商:未知廠家 制造商全稱:未知廠家 功能描述:電表IC