參數(shù)資料
型號(hào)： 71M6543F-IGT/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁數(shù)： 129/157頁
文件大小： 2178K
代理商： 71M6543F-IGT/F
71M6543F/H and 71M6543G/GH Data Sheet
v1.2
2008–2011 Teridian Semiconductor Corporation
73
2.5.14 Test Ports (TMUXOUT and TMUX2OUT Pins)
Two independent multiplexers allow the selection of internal analog and digital signals for the TMUXOUT
and TMUX2OUT pins. These pins are multiplexed with the SEG47 and SEG46 function. In order to function
as test pins, LCD_MAP[46] (I/O RAM 0x2406[6]) and LCD_MAP[47] (I/O RAM 0x2406[7]) must be 0.
One of the digital or analog signals listed in Table 61 can be selected to be output on the TMUXOUT pin.
The function of the multiplexer is controlled with the I/O RAM register TMUX[4:0] (I/O RAM 0x2502[4:0], as
shown in Table 60.
One of the digital or analog signals listed in Table 61 can be selected to be output on the TMUX2OUT pin.
The function of the multiplexer is controlled with the I/O RAM register TMUX2[4:0] (I/O RAM 0x2503[4:0]), as
shown in.
The TMUX and TMUX2 I/O RAM locations are non-volatile and their contents are preserved by
battery power and across resets.
The TMUXOUT and TMUX2OUT pins may be used for diagnosis purposes or in production test. The
RTC 1-second output may be used to calibrate the crystal oscillator. The RTC 4-second output provides
even higher precision.
Table 60: TMUX[4:0] Selections
TMUX[5:0]
Signal Name
Description
1
RTCLK
32.768 kHz clock waveform
9
WD_RST
Indicates when the MPU has reset the watchdog timer. Can be
monitored to determine spare time in the watchdog timer.
A
CKMPU
MPU clock – see Table 8
D
V3AOK bit
Indicates that the V3P3A pin voltage is
≥ 3.0 V. The V3P3A and
V3P3SYS pins are expected to be tied together at the PCB level.
The 71M6543 monitors the V3P3A pin voltage only.
E
V3OK bit
Indicates that the V3P3A pin voltage is
≥ 2.8 V. The V3P3A and
V3P3SYS pins are expected to be tied together at the PCB level.
The 71M654 monitors the V3P3A pin voltage only.
1B
MUX_SYNC
Internal multiplexer frame SYNC signal. See Figure 4
and
1C
CE_BUSY interrupt
1D
CE_XFER interrupt
1F
RTM output from CE
Note:
All
TMUX[5:0] values which are not shown are reserved.
相關(guān)PDF資料
PDF描述
71M6543H-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543F-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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